1. 16 3月, 2012 1 次提交
  2. 06 3月, 2012 2 次提交
  3. 27 2月, 2012 1 次提交
  4. 22 2月, 2012 2 次提交
    • I
      clocksource: scx200_hrt: Fix the build · 10ea9d6f
      Ingo Molnar 提交于
      This commit:
      
        12d6d412: clocksource: scx200_hrt: Convert scx200 to use clocksource_register_hz
      
      Breaks the build on x86-32:
      
        drivers/clocksource/scx200_hrt.c: In function ‘init_hrt_clocksource’:
        drivers/clocksource/scx200_hrt.c:95:0: error: unterminated argument list invoking macro "pr_info"
        drivers/clocksource/scx200_hrt.c:84:2: error: ‘pr_info’ undeclared (first use in this function)
      
      It could not possibly have been build tested, because it had this mismerge:
      
      	pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n",
      	printk(KERN_INFO "enabling scx200 high-res timer (%s MHz +%d ppm)\n",
      		mhz27 ? "27":"1", ppm);
      
      Cc: Jim Cromie <jim.cromie@gmail.com>
      Cc: John Stultz <john.stultz@linaro.org>
      Link: http://lkml.kernel.org/n/tip-jceb26fns5w7tv8edlivhxpa@git.kernel.orgSigned-off-by: NIngo Molnar <mingo@elte.hu>
      10ea9d6f
    • S
      x86/tsc: Reduce the TSC sync check time for core-siblings · b0e5c779
      Suresh Siddha 提交于
      For each logical CPU that is coming online, we spend 20msec for
      checking the TSC synchronization. And as this is done
      sequentially for each logical CPU boot, this time gets added up
      depending on the number of logical CPU's supported by the
      platform.
      
      Minimize this by using the socket topology information.
      
      If the target CPU coming online doesn't have any of its
      core-siblings online, a timeout of 20msec will be used for the
      TSC-warp measurement loop. Otherwise a smaller timeout of 2msec
      will be used, as we have some information about this socket
      already (and this information grows as we have more and more
      logical-siblings in that socket).
      
      Ideally we should be able to skip the TSC sync check on the
      other core-siblings, if the first logical CPU in a socket passed
      the sync test. But as the TSC is per-logical CPU and can
      potentially be modified wrongly by the bios before the OS boot,
      TSC sync test for smaller duration should be able to catch such
      errors. Also this will catch the condition where all the cores
      in the socket doesn't get reset at the same time.
      
      For example, with this modification, time spent in TSC sync
      checks on a 4 socket 10-core with HT system gets reduced from
      1580msec to 212msec.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NArjan van de Ven <arjan@linux.intel.com>
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: venki@google.com
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Link: http://lkml.kernel.org/r/1328581940.29790.20.camel@sbsiddha-desk.sc.intel.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      b0e5c779
  5. 16 2月, 2012 3 次提交
  6. 15 2月, 2012 9 次提交
  7. 14 2月, 2012 22 次提交