1. 03 9月, 2016 1 次提交
    • S
      genirq/generic_chip: Verify irqs_per_chip <= 32 · f88eecfe
      Sebastian Frias 提交于
      Most (if not all) code here implicitly assumes that the maximum number of
      IRQs per chip will be 32, and thus uses 'u32' or 'unsigned long' for many
      tasks (for example "struct irq_data" declares its 'mask' field as 'u32',
      and "struct irq_chip_generic" declares its 'installed' field as 'unsigned
      long')
      
      However, there is no check to verify that irqs_per_chip is <= 32.  Hence,
      calling irq_alloc_domain_generic_chips() with a bigger value will result in
      unexpected results.
      
      Provide a wrapper with a MAYBE_BUILD_BUG_ON(nrirqs >= 32) to catch such
      cases.
      
      [ tglx: Reduced changelog to the essential information ]
      Signed-off-by: NSebastian Frias <sf84@laposte.net>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Mason <slash.tmp@free.fr>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Link: http://lkml.kernel.org/r/57B31D94.5040701@laposte.netSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      f88eecfe
  2. 04 7月, 2016 5 次提交
  3. 30 6月, 2016 6 次提交
  4. 29 6月, 2016 2 次提交
  5. 28 6月, 2016 1 次提交
  6. 25 6月, 2016 5 次提交
  7. 24 6月, 2016 2 次提交
    • P
      locking/static_key: Fix concurrent static_key_slow_inc() · 4c5ea0a9
      Paolo Bonzini 提交于
      The following scenario is possible:
      
          CPU 1                                   CPU 2
          static_key_slow_inc()
           atomic_inc_not_zero()
            -> key.enabled == 0, no increment
           jump_label_lock()
           atomic_inc_return()
            -> key.enabled == 1 now
                                                  static_key_slow_inc()
                                                   atomic_inc_not_zero()
                                                    -> key.enabled == 1, inc to 2
                                                   return
                                                  ** static key is wrong!
           jump_label_update()
           jump_label_unlock()
      
      Testing the static key at the point marked by (**) will follow the
      wrong path for jumps that have not been patched yet.  This can
      actually happen when creating many KVM virtual machines with userspace
      LAPIC emulation; just run several copies of the following program:
      
          #include <fcntl.h>
          #include <unistd.h>
          #include <sys/ioctl.h>
          #include <linux/kvm.h>
      
          int main(void)
          {
              for (;;) {
                  int kvmfd = open("/dev/kvm", O_RDONLY);
                  int vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
                  close(ioctl(vmfd, KVM_CREATE_VCPU, 1));
                  close(vmfd);
                  close(kvmfd);
              }
              return 0;
          }
      
      Every KVM_CREATE_VCPU ioctl will attempt a static_key_slow_inc() call.
      The static key's purpose is to skip NULL pointer checks and indeed one
      of the processes eventually dereferences NULL.
      
      As explained in the commit that introduced the bug:
      
        706249c2 ("locking/static_keys: Rework update logic")
      
      jump_label_update() needs key.enabled to be true.  The solution adopted
      here is to temporarily make key.enabled == -1, and use go down the
      slow path when key.enabled <= 0.
      Reported-by: NDmitry Vyukov <dvyukov@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: <stable@vger.kernel.org> # v4.3+
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Fixes: 706249c2 ("locking/static_keys: Rework update logic")
      Link: http://lkml.kernel.org/r/1466527937-69798-1-git-send-email-pbonzini@redhat.com
      [ Small stylistic edits to the changelog and the code. ]
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      4c5ea0a9
    • B
      pwm: Fix pwm_apply_args() · 33cdcee0
      Boris Brezillon 提交于
      Commit 5ec803ed ("pwm: Add core infrastructure to allow atomic
      updates"), implemented pwm_disable() as a wrapper around
      pwm_apply_state(), and then, commit ef2bf499 ("pwm: Improve args
      checking in pwm_apply_state()") added missing checks on the ->period
      value in pwm_apply_state() to ensure we were not passing inappropriate
      values to the ->config() or ->apply() methods.
      
      The conjunction of these 2 commits led to a case where pwm_disable()
      was no longer succeeding, thus preventing the polarity setting done
      in pwm_apply_args().
      
      Set a valid period in pwm_apply_args() to ensure polarity setting
      won't be rejected.
      Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org>
      Suggested-by: NBrian Norris <briannorris@chromium.org>
      Fixes: 5ec803ed ("pwm: Add core infrastructure to allow atomic updates")
      Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Reviewed-by: NBrian Norris <briannorris@chromium.org>
      Signed-off-by: NThierry Reding <thierry.reding@gmail.com>
      33cdcee0
  8. 23 6月, 2016 2 次提交
  9. 20 6月, 2016 1 次提交
  10. 18 6月, 2016 3 次提交
  11. 16 6月, 2016 2 次提交
    • A
      bpf: fix matching of data/data_end in verifier · 19de99f7
      Alexei Starovoitov 提交于
      The ctx structure passed into bpf programs is different depending on bpf
      program type. The verifier incorrectly marked ctx->data and ctx->data_end
      access based on ctx offset only. That caused loads in tracing programs
      int bpf_prog(struct pt_regs *ctx) { .. ctx->ax .. }
      to be incorrectly marked as PTR_TO_PACKET which later caused verifier
      to reject the program that was actually valid in tracing context.
      Fix this by doing program type specific matching of ctx offsets.
      
      Fixes: 969bf05e ("bpf: direct packet access")
      Reported-by: NSasha Goldshtein <goldshtn@gmail.com>
      Signed-off-by: NAlexei Starovoitov <ast@kernel.org>
      Acked-by: NDaniel Borkmann <daniel@iogearbox.net>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      19de99f7
    • J
      net: Don't forget pr_fmt on net_dbg_ratelimited for CONFIG_DYNAMIC_DEBUG · daddef76
      Jason A. Donenfeld 提交于
      The implementation of net_dbg_ratelimited in the CONFIG_DYNAMIC_DEBUG
      case was added with 2c94b537 ("net: Implement net_dbg_ratelimited() for
      CONFIG_DYNAMIC_DEBUG case"). The implementation strategy was to take the
      usual definition of the dynamic_pr_debug macro, but alter it by adding a
      call to "net_ratelimit()" in the if statement. This is, in fact, the
      correct approach.
      
      However, while doing this, the author of the commit forgot to surround
      fmt by pr_fmt, resulting in unprefixed log messages appearing in the
      console. So, this commit adds back the pr_fmt(fmt) invocation, making
      net_dbg_ratelimited properly consistent across DEBUG, no DEBUG, and
      DYNAMIC_DEBUG cases, and bringing parity with the behavior of
      dynamic_pr_debug as well.
      
      Fixes: 2c94b537 ("net: Implement net_dbg_ratelimited() for CONFIG_DYNAMIC_DEBUG case")
      Signed-off-by: NJason A. Donenfeld <Jason@zx2c4.com>
      Cc: Tim Bingham <tbingham@akamai.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      daddef76
  12. 15 6月, 2016 2 次提交
  13. 13 6月, 2016 6 次提交
    • S
      irqchip/gicv3-its: Implement two-level(indirect) device table support · 3faf24ea
      Shanker Donthineni 提交于
      Since device IDs are extremely sparse, the single, a.k.a flat table is
      not sufficient for the following two reasons.
      
      1) According to ARM-GIC spec, ITS hw can access maximum of 256(pages)*
         64K(pageszie) bytes. In the best case, it supports upto DEVid=21
         sparse with minimum device table entry size 8bytes.
      
      2) The maximum memory size that is possible without memblock depends on
         MAX_ORDER. 4MB on 4K page size kernel with default MAX_ORDER, so it
         supports DEVid range 19bits.
      
      The two-level device table feature brings us two advantages, the first
      is a very high possibility of supporting upto 32bit sparse, and the
      second one is the best utilization of memory allocation.
      
      The feature is enabled automatically during driver probe if the memory
      requirement is more than 2*ITS-pages and the hardware is capable of
      two-level table walk.
      Signed-off-by: NShanker Donthineni <shankerd@codeaurora.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      3faf24ea
    • S
      irqchip/gicv3-its: Split its_alloc_tables() into two functions · 9347359a
      Shanker Donthineni 提交于
      The function is getting out of control, it has too many goto
      statements and would be too complicated for adding a feature
      two-level device table. So, it is time for us to cleanup and
      move some of the logic to a separate function without affecting
      the existing functionality.
      Signed-off-by: NShanker Donthineni <shankerd@codeaurora.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      9347359a
    • J
      irqchip/gic: Add platform driver for non-root GICs that require RPM · 9c8edddf
      Jon Hunter 提交于
      Add a platform driver to support non-root GICs that require runtime
      power-management. Currently, only non-root GICs are supported because
      the functions, smp_cross_call() and set_handle_irq(), that need to
      be called for a root controller are located in the __init section and
      so cannot be called by the platform driver.
      
      The GIC platform driver re-uses many functions from the existing GIC
      driver including some functions to save and restore the GIC context
      during power transitions. The functions for saving and restoring the
      GIC context are currently only defined if CONFIG_CPU_PM is enabled and
      to ensure that these functions are always defined when the platform
      driver is enabled, a dependency on CONFIG_ARM_GIC_PM (which selects the
      platform driver) has been added.
      
      In order to re-use the private GIC initialisation code, a new public
      function, gic_of_init_child(), has been added which calls various
      private functions to initialise the GIC. This is different from the
      existing gic_of_init() because it only supports non-root GICs (ie. does
      not call smp_cross_call() is set_handle_irq()) and is not located in
      the __init section (so can be used by platform drivers). Furthermore,
      gic_of_init_child() dynamically allocates memory for the GIC chip data
      which is also different from gic_of_init().
      
      There is no specific suspend handling for GICs registered as platform
      devices. Non-wakeup interrupts will be disabled by the kernel during
      late suspend, however, this alone will not power down the GIC if
      interrupts have been requested and not freed. Therefore, requestors of
      non-wakeup interrupts will need to free them on entering suspend in
      order to power-down the GIC.
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      9c8edddf
    • J
      irqchip/gic: Prepare for adding platform driver · cdbb813d
      Jon Hunter 提交于
      To support GICs that require runtime power management, it is necessary
      to add a platform driver, so that the probing of the chip can be
      deferred if resources, such as a power-domain, is not yet available.
      
      To prepare for adding a platform driver:
       1. Drop the __init section from the gic_dist_config() so this can be
          re-used by the platform driver.
       2. Add prototypes for functions required by the platform driver to the
          GIC header file so they can be re-used.
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      cdbb813d
    • J
      genirq: Add runtime power management support for IRQ chips · be45beb2
      Jon Hunter 提交于
      Some IRQ chips may be located in a power domain outside of the CPU
      subsystem and hence will require device specific runtime power
      management. In order to support such IRQ chips, add a pointer for a
      device structure to the irq_chip structure, and if this pointer is
      populated by the IRQ chip driver and CONFIG_PM is selected in the kernel
      configuration, then the pm_runtime_get/put APIs for this chip will be
      called when an IRQ is requested/freed, respectively.
      Reviewed-by: NKevin Hilman <khilman@baylibre.com>
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      be45beb2
    • J
      irqdomain: Don't set type when mapping an IRQ · 1e2a7d78
      Jon Hunter 提交于
      Some IRQ chips, such as GPIO controllers or secondary level interrupt
      controllers, may require require additional runtime power management
      control to ensure they are accessible. For such IRQ chips, it makes sense
      to enable the IRQ chip when interrupts are requested and disabled them
      again once all interrupts have been freed.
      
      When mapping an IRQ, the IRQ type settings are read and then programmed.
      The mapping of the IRQ happens before the IRQ is requested and so the
      programming of the type settings occurs before the IRQ is requested. This
      is a problem for IRQ chips that require additional power management
      control because they may not be accessible yet. Therefore, when mapping
      the IRQ, don't program the type settings, just save them and then program
      these saved settings when the IRQ is requested (so long as if they are not
      overridden via the call to request the IRQ).
      
      Add a stub function for irq_domain_free_irqs() to avoid any compilation
      errors when CONFIG_IRQ_DOMAIN_HIERARCHY is not selected.
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      1e2a7d78
  14. 11 6月, 2016 1 次提交
    • B
      net: diag: add missing declarations · c3ec5e5c
      Ben Dooks 提交于
      The functions inet_diag_msg_common_fill and inet_diag_msg_attrs_fill
      seem to have been missed from the include/linux/inet_diag.h header
      file. Add them to fix the following warnings:
      
      net/ipv4/inet_diag.c:69:6: warning: symbol 'inet_diag_msg_common_fill' was not declared. Should it be static?
      net/ipv4/inet_diag.c:108:5: warning: symbol 'inet_diag_msg_attrs_fill' was not declared. Should it be static?
      Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c3ec5e5c
  15. 10 6月, 2016 1 次提交
    • A
      much milder d_walk() race · ba65dc5e
      Al Viro 提交于
      d_walk() relies upon the tree not getting rearranged under it without
      rename_lock being touched.  And we do grab rename_lock around the
      places that change the tree topology.  Unfortunately, branch reordering
      is just as bad from d_walk() POV and we have two places that do it
      without touching rename_lock - one in handling of cursors (for ramfs-style
      directories) and another in autofs.  autofs one is a separate story; this
      commit deals with the cursors.
      	* mark cursor dentries explicitly at allocation time
      	* make __dentry_kill() leave ->d_child.next pointing to the next
      non-cursor sibling, making sure that it won't be moved around unnoticed
      before the parent is relocked on ascend-to-parent path in d_walk().
      	* make d_walk() skip cursors explicitly; strictly speaking it's
      not necessary (all callbacks we pass to d_walk() are no-ops on cursors),
      but it makes analysis easier.
      Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
      ba65dc5e