The previous definition inadvertently omits Octeon which currently is
treated as an architecture variant separate from MIPS32 and MIPS64.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

If a context switch occurred between the watch exception and reading the
watch registers, it would be possible for the new process to corrupt their
state.  Enabling interrupts only after the watch registers are read avoids
this race.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This fixes the ptrace ABI for watch registers, and should allow 64bit
kernels to use the watch register support.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add platform support to use rtc-tx4939 driver.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The special IP27 DMA code selected by DMA_IP27 has been removed a while
ago turning DMA_IP27 into almost a nop.  Also fixup the broken logic of
its last users memcpy.S and memcpy-inatomic.s.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

And while at it, convert all functions from macros to inline functions
for sanity.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This shaves of 1912 bytes of an IP27 defconfig kernel and avoids
unexpected overflow behaviour in atomic_sub_if_positive.  Apply the same
changes to the atomic64_* functions for consistency.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Original commit 1c0fe6e3.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

See discussion e9c3a7c20901051031y528d0d31r18d44c5096c59e0@mail.gmail.com.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that all EEPROM drivers live in the same place, let's harmonize
their symbol names.

Also fix eeprom's dependencies, it definitely needs sysfs, and is no
longer experimental after many years in the kernel tree.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>

Add swab.h to kbuild.asm and remove the individual entries from
each arch, mark as unifdef as some arches have some kernel-only
bits inside.
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This way it matches the generic system call name convention.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replace the current sysctl-based suspend interface with a new sysfs-
based one which also uses the Linux-2.6 suspend model.

To configure wakeup sources, a subtree for the demoboards is created
under /sys/power/db1x:

sys/
`-- power
    `-- db1x
        |-- gpio0
        |-- gpio1
        |-- gpio2
        |-- gpio3
        |-- gpio4
        |-- gpio5
        |-- gpio6
        |-- gpio7
        |-- timer
        |-- timer_timeout
        |-- wakemsk
        `-- wakesrc

The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2
bits of the SYS_WAKEMSK (wakeup source enable) register.  Writing '1'
enables a wakesource, 0 disables it.

The 'timer_timeout' node holds the timeout in seconds after which the
TOYMATCH2 event should wake the system.

The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex),
the 'wakemsk' node can be used to get/set the wakeup mask directly.

For example, to have the timer wake the system after 10 seconds of sleep,
the following must be done in userspace:

echo 10 > /sys/power/db1x/timer_timeout
echo 1 > /sys/power/db1x/timer
echo mem > /sys/power/sleep

This patch also removes the homebrew CPU frequency switching code.  I don't
understand how it could have ever worked reliably; it does not communicate
the clock changes to peripheral devices other than uarts.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 create mode 100644 arch/mips/alchemy/devboards/pm.c

Implement suspend/resume for DBDMA controller and its channels.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Au1550/Au1200 have a different memory controller which requires additi-
onal code to properly put memory to sleep (code taken from AMD/RMI's
Linux-2.6.11 source package).

Also fix up the remaining pm-related paths to compile on Au1200/Au1550
platforms.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that nothing in time.c depends on calc_clock, it can
be moved to clocks.c where it belongs.
While at it, give it a better non-generic name and call it
as soon as possible in plat_mem_init.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent
device.  As a nice side effect, this also enables use of the 'wait'
instruction for runtime idle power savings.

If the counters aren't enabled/working properly, fall back on the
cp0 counter clock code.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The current mips clock build infrastructure lets a system only use
either the MIPS cp0 counter or a SoC specific timer as a clocksource /
clockevent device.

This patch renames the core cp0 counter clocksource / clockevent functions
from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to
call these renamed functions instead.

Chips which can detect whether it is safe to use a chip-specific timer
can now fall back on the cp0 counter if necessary and possible
(e.g. Alchemy with a follow-on patch).

Existing behaviour is not changed in any way.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Remove the cpu_table:
- move detection of whether c0_config[OD] is read-only and should be set
  to fix various chip errata to au1000 headers.
- move detection of write-only sys_cpupll to au1000 headers.
- remove the BCLK switching code:  Activation of this features should be
  left to the boards using the chips since it also affects external devices
  tied to BCLK, and only the board designers know whether it is safe to
  enable.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/cputable.c

There are no in-tree users, so remove them.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add the name set by set_irq_chip_and_handler_name() to the output of
/proc/interrupts, like so:

db1200 ~ # cat /proc/interrupts
           CPU0
  8:         52     Alchemy-IC0-hilevel   serial
 10:        171     Alchemy-IC0-hilevel   au1xxx-mmc
 11:         47     Alchemy-IC0-hilevel   Au1xxx dbdma
 18:          1     Alchemy-IC0-hilevel   au1550-spi
 29:    1250997     Alchemy-IC0-riseedge  timer
 37:        211     Alchemy-IC0-hilevel   ehci_hcd:usb1, ohci_hcd:usb2
 38:          0     Alchemy-IC0-hilevel   lcd
 72:       2623     DB1200 CPLD-level     ide0
 73:        257     DB1200 CPLD-level     eth0
 84:          1     DB1200 CPLD-level     sd_insert
 85:          0     DB1200 CPLD-level     sd_eject

ERR:          0
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Tested on Db1200.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch attempts to modernize core Alchemy interrupt handling code.

- add irq_chips for irq controllers instead of irq type,
- add a set_type() hook to change irq trigger type during runtime,
- add a set_wake() hook to control GPIO0..7 based wakeup,
- use linux' IRQF_TRIGGER_ constants instead of homebrew ones,
- enable GENERIC_HARDIRQS_NO__DO_IRQ.
- simplify plat_irq_dispatch
- merge au1xxx_irqmap into irq.c file, the only place where its
  contents are referenced.
- board_init_irq() is now mandatory for every board; use it to register
  the remaining (gpio-based) interrupt sources; update all boards
  accordingly.

Run-tested on Db1200 and other Au1200 based platforms.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c

Not every alchemy-based board might want these options forced on it,
and most of this stuff seems to be intended for devboard code anyway.
Remove commandline mangling code out of common chip code and instead
add relevant sections to all in-tree boards to not change existing
behaviour.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Share some code and merge small files:
- Extract the prom init code from all devboard files (they only differ in
  memory configuration).
- Merge the irq configuration into board setup code.
- Merge smaller files into board setup code.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/devboards/db1x00/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1000/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1000/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1100/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1100/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1200/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1500/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1500/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1550/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1550/irqmap.c
 create mode 100644 arch/mips/alchemy/devboards/prom.c

This should ease sharing of common devboard code.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We add a dev parameter to plat_unmap_dma_mem(), and hooks for
plat_dma_supported() and plat_extra_sync_for_device() which should be
nop changes for all existing targets.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Expand the case statement for build_tlb_write_entry so that it does
the right thing on Cavium CPU variants.
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NPaul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

For Cavium OCTEON, compute the return epc value for OCTEON specific
branch instructions.
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

For OCTEON, implement a save and restore of the multiplier state
across context switches.
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NPaul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add in the cop2 and cvmseg state info to the known proc reg
data for Cavium so that it can be tracked, saved, restored.
Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>