- 22 11月, 2011 3 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
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由 Kuninori Morimoto 提交于
SH MIPI DSI can use 0-4 lane Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
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由 Kuninori Morimoto 提交于
dsipck clock is controled by CLKDEV_ICK_ID() in clock-shxxx. dsi0p_clk/dsi1p_clk naming is not needed. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
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- 11 11月, 2011 9 次提交
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由 Magnus Damm 提交于
The following commits break cpuidle on SH-Mobile ARM: 46bcfad7 cpuidle: Single/Global registration of idle states e978aa7d cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state This patch remedies these issues by up-porting the SH-Mobile code to fit with the above introduced framework changes. It is worth noting that the new code becomes significantly cleaner, so these framework changes are very welcome. At the same time this breakage could probably have been avoided by grepping for "last_state" and "cpuidle_register_driver". Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
This patch moves PORT_xx helper macro to sh_pfc.h, and it expects CPU_ALL_PORT() macro for each CPU Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
This patch move PORT_DATA_xx helper macro to sh_pfc.h. and pfc-sh7372.c used it Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
it is not necessary to have sh7372_xxxx index on static variable Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
This patch adds MMC data pin pull-up option for pfc-sh73a0.c, and select it on ag5evm board. The MMC read/write will be error without this patch. Cc: Takashi YOSHII <takashi.yoshii.zj@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
The runtime PM platform support stub in use by ARM-based SH/R-Mobile platforms contains nothing that's specifically ARM-related and instead of wholly generic to anything using the clock framework. The recent runtime PM changes interact rather badly with the lazy disabling of clocks late in the boot process through the clock framework, leading to situations where the runtime suspend/resume paths are entered without a clock being actively driven due to having been lazily gated off. In order to correct this we can trivially tie in the aforementioned stub as a general fallback for all SH platforms that don't presently have their own runtime PM implementations (the corner case being SH-based SH-Mobile platforms, which have their own stub through the hwblk API -- which in turn has bitrotted and will be subsequently adapted to use the same stub as everyone else), regardless of whether the platforms choose to define power domains of their own or not. This fixes up regressions for clock framework users who also build in runtime PM support without any specific power domains of their own, which was previously causing the serial console to be lost when warring with lazy clock disabling. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 05 11月, 2011 8 次提交
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由 Guennadi Liakhovetski 提交于
ag5evm implements a backlight control, using an I2C controller, therefore it needs CONFIG_I2C to fix this make failure arch/arm/mach-shmobile/built-in.o: In function `lcd_on': pfc-sh73a0.c:(.text+0x2334): undefined reference to `i2c_get_adapter' pfc-sh73a0.c:(.text+0x2370): undefined reference to `i2c_transfer' (ignore pfc-sh73a0.c) and to build successfully. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Support PINT on sh73a0 and AG5EVM using INTC PINT macros. With this patch applied the AG5EVM ethernet is handled through one of the chained sh73a0 PINT interrupt controllers. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add a INTC_PINT() macro with various helper bits to allow SoCs like sh73a0 to suppor the PINT hardware using regular INTC tables. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Implement GPIO hotplugging via TMIO_MMC_HAS_COLD_CD for AG5EVM SDHI0. This is possible now when INTCA is used for IRQ triggering on sh73a0. Without INTCA IRQ support we are left with the GIC hardware block that does not support dealing with active low interrupt sources. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Improve IRQ triggering support by making use of the macro INTC_IRQ_PINS_32() for INTCA on sh73a0. Unfortunately it is not as easy as just using the macro as-is, we need to do mask and unmaks in the GIC but configure other bits and ack in INTCA. Update GPIO IRQ mappings while at it. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_32() for INTCA on sh7372. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_32() for INTCA on sh7377. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Make use of INTC_IRQ_PINS_16() for INTCA on sh7367. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 04 11月, 2011 7 次提交
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由 Magnus Damm 提交于
This patch adds support for sh73a0 GPIO IRQs by making use of the PFC GPIO IRQ feature. Only IRQ pins are supported at this time. In the future when PINT interrupts also are supported properly we can easily extend the table with such information. Also, the sh73a0 is currently making use of the GIC for external interrupt which is rather unflexible when it comes to triggering configuration at this point. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Bastian Hecht 提交于
Always use CS0 shadow area for NOR flash instead of regular CS0 memory area on ap4evb. When booting from CS0 NOR Flash the regular CS0 memory area is available, but when booting via USB the MASK ROM gets mapped to 0x0 which gets in the way for the NOR Flash. Always using CS0 shadow area works well for both NOR Flash boot and USB boot. Signed-off-by: NBastian Hecht <hechtb@gmail.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Always use CS0 shadow area for NOR flash instead of regular CS0 memory area on Mackerel. When booting from CS0 NOR Flash the regular CS0 memory area is available, but when booting via USB the MASK ROM gets mapped to 0x0 which gets in the way for the NOR Flash. Always using CS0 shadow area works well for both NOR Flash boot and USB boot. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add INTC_IRQ_PINS_16() and INTC_IRQ_PINS_32() to mach/intc.h. These macros define 16 or 32 external IRQ pins on a certain memory base address. Can be used with INTCA or INTCS. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
The sh_mobile_ceu_camera driver has been converted to use the V4L2 subdevice .[gs]_mbus_config() operations, therefore we don't need SOCAM_* flags for the soc_camera_platform driver anymore. Remove them. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
Prepare the board to switch to the new subdevice media-bus configuration operations. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
The sh_mobile_csi2 driver will change meaning of the .lanes platform data field from "bitmask of used lanes" to "number of used lanes." To avoid a regression during this transition switch ap4evb to rely on the 2 lane default. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
These files all make use of one of the EXPORT_SYMBOL variants or the THIS_MODULE macro. So they will need <linux/export.h> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 27 10月, 2011 1 次提交
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由 Simon Horman 提交于
This allows specific (non-multiplexed) IRQ handlers to be used. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 23 10月, 2011 1 次提交
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由 Marc Zyngier 提交于
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NDavid Brown <davidb@codeaurora.org> Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 22 10月, 2011 2 次提交
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由 Magnus Damm 提交于
This change adds support for the sh7372 A4R power domain. The sh7372 A4R hardware power domain contains the SH CPU Core and a set of I/O devices including multimedia accelerators and I2C controllers. One special case about A4R is the INTCS interrupt controller that needs to be saved and restored to keep working as expected. Also the LCDC hardware blocks are in a different hardware power domain but have their IRQs routed only through INTCS. So as long as LCDCs are active we cannot power down INTCS because that would risk losing interrupts. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This change adds support for the sh7372 A3SP power domain. The sh7372 A3SP hardware power domain contains a wide range of I/O devices. The list of I/O devices include SCIF serial ports, DMA Engine hardware, SD and MMC controller hardware, USB controllers and I2C master controllers. This patch adds the A3SP low level code which powers the hardware power domain on and off. It also ties in platform devices to the pm domain support code. It is worth noting that the serial console is hooked up to SCIFA0 on most sh7372 boards, and the SCIFA0 port is included in the A3SP hardware power domain. For this reason we cannot output debug messages from the low level power control code in the case of A3SP. QoS support is needed in drivers before we can enable the A3SP power control on the fly. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 21 10月, 2011 1 次提交
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由 Russell King 提交于
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 10月, 2011 2 次提交
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由 Will Deacon 提交于
This patch uses the new cpu_logical_map() macro for converting logical CPU numbers into physical numbers when dealing with the SCU in the SMP boot path for sh73a0. Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Sascha Hauer 提交于
Boards used to specify zreladdr in their Makefile.boot with zreladdr-y := x, so conflicting zreladdrs were silently overwritten. This patch changes this to zreladdr-y += x, so that we end up with multiple words in zreladdr in such a case. We can detect this later and complain if necessary. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 10月, 2011 1 次提交
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由 Kuninori Morimoto 提交于
some renesas_usbhs device is supporting OTG external device interface. In that device, it is necessary to control PWEN/EXTLP on DVSTCTR. This patch support it. But renesas_usbhs driver doesn't have OTG support for now. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 26 9月, 2011 3 次提交
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由 Magnus Damm 提交于
Update the sh7372 sleep code to build parts of the code only when SUSPEND and/or CPU_IDLE are set. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This patch adds sh7372 A3SM power domain support. The sh7372 A3SM hardware power domain contains the ARM Cortex-A8 CPU Core including L2 cache. This sleep mode can be seen as a one step deeper sleep mode from the already existing Core Standby mode. To wake up from A3SM sleep only a few wakeup sources are supported - so the regular INTC controller will not be able to help us unfortunately. The code in this patch will enter A3SM sleep via the regular Suspend-to-RAM interface in the case of only wakeups supported by A3SM are enabled. If unsupported wakeups are enabled then Core Standby will be used instead. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
Convert the sh7372 Core Standby code to make use of the new generic ARM cpu suspend/resume code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 29 8月, 2011 1 次提交
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由 Magnus Damm 提交于
Add SDHI0 and SDHI1 support to the Kota2 board. SDHI0 is hooked up to a microSD card slot and SDHI1 to a wireless module that also connects to SCIFB. This depends on the recently merged code for TMIO_MMC_HAS_IDLE_WAIT together with PFC support for pull-ups on SDHI0 and SDHI1. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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