- 11 6月, 2014 25 次提交
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由 Catherine Sullivan 提交于
Bump versions. Change-ID: Ic4a84354955061ca18321b1e97c9c30fe1563b5c Signed-off-by: NCatherine Sullivan <catherine.sullivan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Shannon Nelson 提交于
No need to read the PCI register for the PF's base queue on every single Tx queue enable and disable as we already have the value stored from reading the capability features at startup. Change-ID: Ic02fb622757742f43cb8269369c3d972d4f66555 Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
A drop action comes down as a ring_cookie value, so allow it as a special value that can be used to configure destination control. Also fix the output to filter read command accordingly. Change-ID: I9956723cee42f3194885403317dd21ed4a151144 Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
Add members to stat struct to keep track of Flow director ATR and SideBand filter packet matches. Change-ID: Ibbb31a53c7adcc2bb96991dd80565442a2f2513c Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jesse Brandeburg 提交于
This change drops the FTYPE field from the Rx descriptor, to match the hardware implementation. Change-ID: I66d31d2b43861da45e8ace4fb03df033abe88bab Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Mitch Williams 提交于
FW can indicate any admin queue error states to the driver via some bits in the length registers. Each time we process an admin queue message, check these bits and log any errors we find. Since the VF really can't do much, we just print the message and depend on the PF driver to clear things up on our behalf. Change-ID: I92bc6c53ce3b4400544e0ca19c5de2d27490bd0d Signed-off-by: NMitch Williams <mitch.a.williams@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Greg Rose 提交于
Linux gives us a function to copy Ethernet MAC addresses, let's use it. Change-ID: I0c861900029ca5ea65a53ca39565852fb633f6fd Signed-off-by: NGreg Rose <gregory.v.rose@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Greg Rose 提交于
Remove the filter created by the firmware with the default MAC address it reads out of the NVM storage and a promiscuous VLAN tag and replace it with a filter that will not accept tagged packets by default. The system must request a VLAN tag packet filter to get packets with that tag. Change-ID: I119e6c3603a039bd68282ba31bf26f33a575490a Signed-off-by: NGreg Rose <gregory.v.rose@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Neerav Parikh 提交于
Currently if the firmware reports DCB capability the driver enables I40E_FLAG_DCB_ENABLED flag. When this flag is enabled the driver inserts a tag when transmitting a packet from the port even if there are no DCB traffic classes configured at the port. This patch adds a new flag I40E_FLAG_DCB_CAPABLE that will be set when the DCB capability is present and the existing flag I40E_FLAG_DCB_ENABLED will be set only if there are more than one traffic classes configured at the port. Change-ID: I24ccbf53ef293db2eba80c8a9772acf729795bd5 Signed-off-by: NNeerav Parikh <neerav.parikh@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Mitch Williams 提交于
If the device is down, there's no place to go but up, so don't try to go down even more. This prevents a CPU soft lock in napi_disable(). Change-ID: I8b058b9ee974dfa01c212fae2597f4f54b333314 Signed-off-by: NMitch Williams <mitch.a.williams@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
In XL710 devices we program FD filter's fields from Tx perspective of the flow. However the user interface exposed in ethtool should be compliant with the previous generation of drivers where a filter src and dst field are from the RX perspective. This patch changes the ethtool interface in this regard to match the other drivers. Change-ID: Iec6ccddd87357c4fb53ccf33aa0fae699faf70cf Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Shannon Nelson 提交于
Add set_pf_context, replace set_phy_reset with set_phy_debug, add nvm_config_read/write, remove nvm_read/write_reg_se and add some PHY types. With these changes we bump the API version to 1.2. Change-ID: I4dc3aec175c2316f66fc9b726b3f7d594699d84e Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Ashish Shah 提交于
Set appropriate fields in Tx queue configuration virtchnl message to pf to enable headwb and setup headwb addr. Then use that info from the VF to set headwb and headwb_addr instead of always enabling them. Change-ID: I7d393d1b2b07f0f3355b3a4f7c2d3c6ee3b0d622 Signed-off-by: NAshish Shah <ashish.n.shah@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jacob Keller 提交于
This patch separates the hardware logic from the set function, so that we can re-use it during a ptp_reset. This enables the reset to return functionality to the last known timestamp mode, rather than resetting the value. We initialize the mode to off during the ptp_init cycle. Signed-off-by: NJacob Keller <jacob.e.keller@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Todd Fujinaka 提交于
Return a 0 directly rather than a constant. Reported-by: NPeter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: NTodd Fujinaka <todd.fujinaka@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Ben Hutchings 提交于
Use dma_addr_t for DMA address parameters and u32 for shared memory offset parameters. Do not assume that dma_addr_t is the same as unsigned long; it will not be in PAE configurations. Truncate DMA addresses to 32 bits when printing them. This is OK because the DMA mask for this device is 32-bit (per default). Also rename the DMA address parameters from 'skb' to 'dma'. Compile-tested only. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Wei Yang 提交于
Following commit befdf897 "net/mlx4_core: Preserve pci_dev_data after __mlx4_remove_one()", there are two mlx4 pci callbacks which will attempt to release the mlx4_priv object -- .shutdown and .remove. This leads to a use-after-free access to the already freed mlx4_priv instance and trigger a "Kernel access of bad area" crash when both .shutdown and .remove are called. During reboot or kexec, .shutdown is called, with the VFs probed to the host going through shutdown first and then the PF. Later, the PF will trigger VFs' .remove since VFs still have driver attached. Fix that by keeping only one driver entry which releases mlx4_priv. Fixes: befdf897 ('net/mlx4_core: Preserve pci_dev_data after __mlx4_remove_one()') CC: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NWei Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jack Morgenstein 提交于
The Hypervisor driver tracks free slots and reserved slots at the global level and tracks allocated slots and guaranteed slots per VF. Guaranteed slots are treated as reserved by the driver, so the total reserved slots is the sum of all guaranteed slots over all the VFs. As VFs allocate resources, free (global) is decremented and allocated (per VF) is incremented for those resources. However, reserved (global) is never changed. This means that effectively, when a VF allocates a resource from its guaranteed pool, it is actually reducing that resource's free pool (since the global reserved count was not also reduced). The fix for this problem is the following: For each resource, as long as a VF's allocated count is <= its guaranteed number, when allocating for that VF, the reserved count (global) should be reduced by the allocation as well. When the global reserved count reaches zero, the remaining global free count is still accessible as the free pool for that resource. When the VF frees resources, the reverse happens: the global reserved count for a resource is incremented only once the VFs allocated number falls below its guaranteed number. This fix was developed by Rick Kready <kready@us.ibm.com> Reported-by: NRick Kready <kready@us.ibm.com> Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Rickard Strandqvist 提交于
Logical conjunction always evaluates to false: minor < 2 && minor > 1 I guess what you wanted is rather: minor > 2 || minor < 1 This was partly found using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Rickard Strandqvist 提交于
A check on a memory allocation is checked incorrectly. This was partly found using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Acked-by: NGeoff Levand <geoff@infradead.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 françois romieu 提交于
Fix following compilation warning: [...] CC drivers/net/phy/amd-xgbe-phy.o drivers/net/phy/amd-xgbe-phy.c:1353:30: warning: ‘amd_xgbe_phy_ids’ defined but not used [-Wunused-variable] static struct mdio_device_id amd_xgbe_phy_ids[] = { ^ Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Acked-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: NCasey Leedom <leedom@chelsio.com> Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Fixed a bug that shows up with recv window sizes that exceed the size of the RCV_BUFSIZ field in opt0 (>= 1024K). If the recv window exceeds this, then we specify the max possible in opt0, add add the rest in via a RX_DATA_ACK credits. Signed-off-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Select the appropriate hw mtu index and initial sequence number to optimize hw memory performance. Add new cxgb4_best_aligned_mtu() which allows callers to provide enough information to be used to [possibly] select an MTU which will result in the TCP Data Segment Size (AKA Maximum Segment Size) to be an aligned value. If an RTR message exhange is required, then align the ISS to 8B - 1 + 4, so that after the SYN the send seqno will align on a 4B boundary. The RTR message exchange will leave the send seqno aligned on an 8B boundary. If an RTR is not required, then align the ISS to 8B - 1. The goal is to have the send seqno be 8B aligned when we send the first FPDU. Based on original work by Casey Leedom <leeedom@chelsio.com> and Steve Wise <swise@opengridcomputing.com> Signed-off-by: NCasey Leedom <leedom@chelsio.com> Signed-off-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hariprasad Shenai 提交于
Currently indirect interrupts for RDMA CQs funnel through the LLD's RDMA RXQs, which also handle direct interrupts for offload CPLs during RDMA connection setup/teardown. The intended T4 usage model, however, is to have indirect interrupts flow through dedicated IQs. IE not to mix indirect interrupts with CPL messages in an IQ. This patch adds the concept of RDMA concentrator IQs, or CIQs, setup and maintained by the LLD and exported to iw_cxgb4 for use when creating CQs. RDMA CPLs will flow through the LLD's RDMA RXQs, and CQ interrupts flow through the CIQs. Design: cxgb4 creates and exports an array of CIQs for the RDMA ULD. These IQs are sized according to the max available CQs available at adapter init. In addition, these IQs don't need FL buffers since they only service indirect interrupts. One CIQ is setup per RX channel similar to the RDMA RXQs. iw_cxgb4 will utilize these CIQs based on the vector value passed into create_cq(). The num_comp_vectors advertised by iw_cxgb4 will be the number of CIQs configured, and thus the vector value will be the index into the array of CIQs. Based on original work by Steve Wise <swise@opengridcomputing.com> Signed-off-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 6月, 2014 13 次提交
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由 Shannon Nelson 提交于
Bumpity and Fred Worm say it's time to change the numbers again. Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Change-ID: I658731d022ea23cedede4be2bfecd8b4cc68d270 Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
We tell the HW upper boundary of power of 2 in VSI config, but the HW does not restrict us to use just power of 2 GPS in case of RSS as long as we are not sharing the RSS table with another VSI (VMDq). We at present are not doing RSS in VMDq VSI. If we were to enable that and if the system had CPU count which was not power 2, the VMDq VSIs will see a little skewed distribution. Change-ID: I3ea797ce9065a3ca4fc4d04251bf195463410473 Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Greg Rose 提交于
Delete all the old and stale MAC filters for the VF VSI when the host administrator changes the VF MAC address from under its feet. Also don't bother to add a filter for the VSI when its going to go away anyway. Just record the new address and punch the VF reset. Change-ID: Ic0d12055926f41989d1965ccf500053729c063ad Signed-off-by: NGreg Rose <gregory.v.rose@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
FD_SB and FD_ATR needs to be checked independently in order to decide if we will support multiple queues or not. Change-ID: I9d3274f5924c79e29efdbcf66a2fcca1fee2107f Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jesse Brandeburg 提交于
The driver was not marking packets with bad checksums correctly, especially IPv6 packets with a bad checksum. To do this correctly we need a define that may be set by hardware in rare cases. Change-ID: I1a997b72b491ded27a78ac3bce1197b2d2611130 Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Frank Zhang 提交于
Modify the logic in i40e_determine_queue_usage() so that SR-IOV doesn't get turned off unnecessarily. Change-ID: I86ca304fa9f742a50e9ea831b887f358a6a9d53d Signed-off-by: NFrank Zhang <frank_1.zhang@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Anjali Singhai Jain 提交于
This patch changes the way resources are distributed to special features. Change-ID: I847e49d714a1d70e97f3f994cb39bfb5e02ab016 Signed-off-by: NAnjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Mitch Williams 提交于
Our hardware supports VF antispoofing for both MAC addresses and VLANs. Enable this feature by default for all VFs and implement the netdev op to control it from the command line. Change-ID: Ifb941da22785848aa3aba6b2231be135b8ea8f31 Signed-off-by: NMitch Williams <mitch.a.williams@intel.com> Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Shannon Nelson 提交于
We don't need to complain in the log about mac addresses that can't be deleted because they don't exist. Change-ID: I4e6370df175bf72726f06d2206c03bcbfded8387 Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Shannon Nelson 提交于
This was a vestige of early driver development that no longer has any actual use. Change-ID: I95b5b19c4bbfaff8759197af671ebaf716cb6ab5 Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Mitch Williams 提交于
The number of VSIs that the firmware reports to us is a guaranteed minimum, not an absolute maximum. The hardware actually supports far more than the reported value, which we often need. To allow for this, we allocate space for a larger number of VSIs than is guaranteed by the firmware, with the knowledge that we may fail to get them all in the future. Note that we are just allocating pointers here, the actual (much larger) VSI structures are allocated on demand. Change-ID: I6f4e535ce39d3bf417aef78306e04fbc7505140e Signed-off-by: NMitch Williams <mitch.a.williams@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Catherine Sullivan 提交于
Fix function header comment to have the correct function name. Signed-off-by: NCatherine Sullivan <catherine.sullivan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Shannon Nelson 提交于
Check for error status bits on the AdminQ event queue and announce them if seen. If the Firmware sets these bits, it will trigger an AdminQ interrupt to get the driver's attention to process the ARQ, which will likely be enough to clear the actual issue. Signed-off-by: NShannon Nelson <shannon.nelson@intel.com> Change-ID: I009e0ebc8be764e40e193b29aed2863f43eb5cb0 Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 08 6月, 2014 2 次提交
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由 Catherine Sullivan 提交于
Bump i40e to 0.4.5 and i40evf to 0.9.29. Change-ID: I9faca5544446518c5425612e733499cf16ef20a1 Signed-off-by: NCatherine Sullivan <catherine.sullivan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jesse Brandeburg 提交于
Remove two device IDs 1582 and 1573, because they will not be shipped. Change-ID: Ica2e550b5b21a69e3f353eba2fe5e1c532a548c4 Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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