- 21 1月, 2013 1 次提交
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由 Andy Shevchenko 提交于
Currently descriptors are allocated from normal cacheable memory and that slows down filling the descriptors, as we need to call cache_coherency routines afterwards. It would be better to allocate memory for these descriptors from DMA_COHERENT memory. This would make code much cleaner too. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 20 1月, 2013 3 次提交
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由 Cong Ding 提交于
the variable chan is dereferenced in line 635, so it is no reason to check null again in line 641. Signed-off-by: NCong Ding <dinggnu@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Cong Ding 提交于
the pointer cfg is dereferenced in line 594, so it's no reason to check null again in line 620. Signed-off-by: NCong Ding <dinggnu@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Matt Porter 提交于
The edma_slave_config() implementation depends on the direction field such that it will not properly configure a slave channel when called without direction set. This fixes the implementation so that the slave config is copied as is and prep_slave_sg() handles the direction dependent handling. spi-omap2-mcspi and omap_hsmmc both expose this bug as they configure the slave channel config from a common path with an unconfigured direction field. Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 13 1月, 2013 1 次提交
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由 Alessandro Rubini 提交于
The header is used by drivers/dma/amba-pl08x.c, which can be compiled under x86, where PL080 exists under a PCI-to-AMBA bridge. This patche moves it where it can be accessed by other architectures, and fixes all users. Signed-off-by: NAlessandro Rubini <rubini@gnudd.com> Acked-by: NGiancarlo Asnaghi <giancarlo.asnaghi@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 12 1月, 2013 11 次提交
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由 Heikki Krogerus 提交于
The DMA transfer could not be established if previously it was paused and terminated. In that case the channel's suspend bit remains set that prevents to transfer anything until channel is resumed. The patch adds the dwc_chan_resume() call instead of a plain flag assignment. That clears the DWC_CFGL_CH_SUSP bit as well during termination. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The same information could be extracted from the struct dma_chan. The patch introduces helper function dwc_get_data_width() as well. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The driver requires a custom slave configuration to be present to be able to make the slave transfers. Nevertheless, in some cases we need only the request line as an additional information to the generic slave configuration. The request line is provided by slave_id parameter of the dma_slave_config structure. That's why the custom slave configuration could be optional for such cases. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
Currently the direction value comes from the generic slave configuration structure and explicitly as a preparation function parameter. The first one is kinda obsoleted. Thus, we have to store the value passed to the preparation function somewhere in our structures to be able to use it later. The best candidate to provide the storage is a custom channel structure. Until now we still keep and check the direction field of the slave config structure as well. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
If we don't yet have the platform device for the driver when it is being loaded we fail to probe the driver. So instead of calling probe() directly we call platform_driver_register(). It will call the probe() immediately if we have the device but also makes the driver to work on platforms where the platform device is created later. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The is_slave_direction helps to check if the transfer type is slave. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
dma_transfer_direction is a normal enum. It means we can't usually use the values as bit fields. Let's adjust this check and move it above the usage of the direction parameter, due to the nature of the following usage of it. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
dma_transfer_direction is a normal enum. It means we can't usually use the values as bit fields. Let's adjust this check and move it above the usage of the direction parameter, due to the nature of the following usage of it. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
This function helps to distinguish the slave type of transfer by checking the direction parameter. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 09 1月, 2013 5 次提交
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由 Andy Shevchenko 提交于
We will use at least the dwc_chan_resume() later. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The "else" keyword in the dw_dma_tasklet is removed as well. All together simplifies the logic of the code and understanding of what is happening there. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
There is no need to check the callback_required parameter, due to we check the callback pointer to be a non-NULL. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
Otherwise we get a warning in case of CONFIG_DMA_API_DEBUG=y [ 45.775943] WARNING: at lib/dma-debug.c:933 check_unmap+0x5d6/0x6ac() [ 45.782369] dw_dmac dw_dmac.0: DMA-API: device driver failed to check map error[device address=0x00000000356efcc0] [size=28 bytes] [mapped as single] Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The patch allows to probe the device when platform data is absent and hardware auto configuration is enabled. In that case the default platform data is used where the channel allocation order is set to ascending, channel priority is set to ascending, and private property is set to true. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 08 1月, 2013 19 次提交
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由 Fabio Estevam 提交于
Fix the following warnings when building with W=1 option: drivers/dma/mxs-dma.c: In function 'mxs_dma_alloc_chan_resources': drivers/dma/mxs-dma.c:368:25: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c: In function 'mxs_dma_prep_slave_sg': drivers/dma/mxs-dma.c:481:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c:494:3: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c:515:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] drivers/dma/mxs-dma.c: In function 'mxs_dma_prep_dma_cyclic': drivers/dma/mxs-dma.c:563:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Laxman Dewangan 提交于
NVIDIA's Tegra114 has APB DMA controller which has 32 dma channels and support support channel wise pause control. Add support for Tegra114 which uses the channel wise pause control hardware feature. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Laxman Dewangan 提交于
NVIDIA's some SoCs like Tegra114 support the channel wise pause control inplace of global pause which pauses all DMA channels. When SoCs support the channel wise pause control then it uses the global pause for clock gating for register access as well as all DMA channel pause. Hence DMA registers are not accessible if DMAs are globally paused on these new SoCs. Add support for channel wise pause feature if SoCs support it. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jean Delvare 提交于
I was checking why this spinlock was never initialized, but it turns out it's not used anywhere, so we can drop it. Signed-off-by: NJean Delvare <khali@linux-fr.org> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NDan Williams <djbw@fb.com>
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由 Maciej Sosnowski 提交于
When providers get blocked unregister_dca_providers() is called ending up with dca_providers and dca_domain lists emptied. Dca should be prevented from trying to unregister any provider if dca_domain list is found empty. Cc: <stable@vger.kernel.org> Reported-by: NJiang Liu <jiang.liu@huawei.com> Tested-by: NGaohuai Han <hangaohuai@huawei.com> Signed-off-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: NDan Williams <djbw@fb.com>
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由 Dave Jiang 提交于
The existing code set a value in the PCI_CHANERRMSK_INT register for a workaround to address a pre-silicon bug on the Intel 5520 IO hub that has been fixed when the hardware was released. There is no need for this code. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <djbw@fb.com>
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由 Dave Jiang 提交于
The PCI IDs for IvyBridge IOAT DMA needs to go into a header file since dma_v3.c looks them up for certain hardware workarounds. Need to add to the alignment workaround for IOAT 3.2 since it wasn't fixed in IVB. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <djbw@fb.com>
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dma_wait_for_async_tx() can also return DMA_PAUSED (which should be considered as error). Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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Removal of the busy-loop from dma_sync_wait() is not a trivial task so just add cpu_relax() to the loop for now. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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Just use dma_async_is_tx_complete() directly. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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Just use dma_async_issue_pending() directly. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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Add missing <linux/module.h> include. Cc: Dan Williams <djbw@fb.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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Make ioat_xor_val_self_test() do DMA unmapping itself and fix handling of failure cases. Cc: Dan Williams <djbw@fb.com> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDan Williams <djbw@fb.com>
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由 Shiraz Hashim 提交于
dmatest erroneously terminated transfers in normal cases also leading to test failures for multiple threads over a channel. Fix this and terminate transfers only in case of errors. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Guennadi Liakhovetski 提交于
If dmaengine driver's .device_alloc_chan_resources() method returns -ENODEV, dma_request_channel() will decide, that the driver has been removed and will remove the device from its list. To prevent this use ENXIO if a slave lookup fails. Reported-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: stable@vger.kernel.org Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Jon Mason 提交于
device_control is an optional and not implemented in all DMA drivers. Any calls to these will result in a NULL pointer dereference. dmatest makes two of these calls when completing the kernel thread and removing the module. These are corrected by calling the dmaengine_device_control wrapper and checking for a non-existant device_control function pointer there. Signed-off-by: NJon Mason <jon.mason@intel.com> CC: Vinod Koul <vinod.koul@intel.com> CC: Dan Williams <djbw@fb.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Sachin Kamat 提交于
devm_* functions are device managed and make the code and error handling a bit simpler. Cc: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Barry Song 提交于
commit b14dab79(DMAEngine: Define interleaved transfer request api) adds interleaved request api, this patch adds the dmaengine_prep_interleaved_dma just like we have dmaengine_prep_ for other modes to avoid drivers call: xxx_chan->device->device_prep_interleaved_dma(). Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Barry Song 提交于
The driver supports old up SiRFprimaII SoCs, this patch makes it support the new SiRFmarco as well. SiRFmarco, as a SMP SoC, adds new DMA_INT_EN_CLR and DMA_CH_LOOP_CTRL_CLR registers, to disable IRQ/Channel, we should write 1 to the corresponding bit in the two CLEAR register. Tested on SiRFmarco using SPI driver: $ /mnt/spidev-sirftest -D /dev/spidev32766.0 spi mode: 0 bits per word: 8 max speed: 500000 Hz (500 KHz) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 $ cat /proc/interrupts CPU0 CPU1 32: 1593 0 GIC sirfsoc_timer0 33: 0 3533 GIC sirfsoc_timer1 44: 0 0 GIC sirfsoc_dma 45: 16 0 GIC sirfsoc_dma 47: 6 0 GIC sirfsoc_spi 50: 5654 0 GIC sirfsoc-uart ... Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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