1. 19 10月, 2016 1 次提交
    • J
      KVM: MIPS: Add missing uaccess.h include · d852b5f3
      James Hogan 提交于
      MIPS KVM uses user memory accessors but mips.c doesn't directly include
      uaccess.h, so include it now.
      
      This wasn't too much of a problem before v4.9-rc1 as asm/module.h
      included asm/uaccess.h, however since commit 29abfbd9 ("mips:
      separate extable.h, switch module.h to it") this is no longer the case.
      
      This resulted in build failures when trace points were disabled, as
      trace/define_trace.h includes trace/trace_events.h only ifdef
      TRACEPOINTS_ENABLED, which goes on to include asm/uaccess.h via a couple
      of other headers.
      
      Fixes: 29abfbd9 ("mips: separate extable.h, switch module.h to it")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      d852b5f3
  2. 29 9月, 2016 1 次提交
    • J
      KVM: MIPS: Invalidate TLB by regenerating ASIDs · 25b08c7f
      James Hogan 提交于
      Invalidate host TLB mappings when the guest ASID is changed by
      regenerating ASIDs, rather than flushing the entire host TLB except
      entries in the guest KSeg0 range.
      
      For the guest kernel mode ASID we regenerate on the spot when the guest
      ASID is changed, as that will always take place while the guest is in
      kernel mode.
      
      However when the guest invalidates TLB entries the ASID will often by
      changed temporarily as part of writing EntryHi without the guest
      returning to user mode in between. We therefore regenerate the user mode
      ASID lazily before entering the guest in user mode, if and only if the
      guest ASID has actually changed since the last guest user mode entry.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      25b08c7f
  3. 16 9月, 2016 1 次提交
  4. 02 8月, 2016 1 次提交
  5. 05 7月, 2016 5 次提交
    • J
      MIPS: KVM: Don't save/restore lo/hi for r6 · 70e92c7e
      James Hogan 提交于
      MIPSr6 doesn't have lo/hi registers, so don't bother saving or
      restoring them, and don't expose them to userland with the KVM ioctl
      interface either.
      
      In fact the lo/hi registers aren't callee saved in the MIPS ABIs anyway,
      so there is no need to preserve the host lo/hi values at all when
      transitioning to and from the guest (which happens via a function call).
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim KrÄmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      70e92c7e
    • J
      MIPS: KVM: Relative branch to common exit handler · 1f9ca62c
      James Hogan 提交于
      Use a relative branch to get from the individual exception vectors to
      the common guest exit handler, rather than loading the address of the
      exit handler and jumping to it.
      
      This is made easier due to the fact we are now generating the entry code
      dynamically. This will also allow the exception code to be further
      reduced in future patches.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim KrÄmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1f9ca62c
    • J
      MIPS: KVM: Dynamically choose scratch registers · 1e5217f5
      James Hogan 提交于
      Scratch cop0 registers are needed by KVM to be able to save/restore all
      the GPRs, including k0/k1, and for storing the VCPU pointer. However no
      registers are universally suitable for these purposes, so the decision
      should be made at runtime.
      
      Until now, we've used DDATA_LO to store the VCPU pointer, and ErrorEPC
      as a temporary. It could be argued that this is abuse of those
      registers, and DDATA_LO is known not to be usable on certain
      implementations (Cavium Octeon). If KScratch registers are present, use
      them instead.
      
      We save & restore the temporary register in addition to the VCPU pointer
      register when using a KScratch register for it, as it may be used for
      normal host TLB handling too.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim KrÄmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1e5217f5
    • J
      MIPS: KVM: Add dumping of generated entry code · d7b8f890
      James Hogan 提交于
      Dump the generated entry code with pr_debug(), similar to how it is done
      in tlbex.c, so it can be more easily debugged.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim KrÄmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      d7b8f890
    • J
      MIPS; KVM: Convert exception entry to uasm · 90e9311a
      James Hogan 提交于
      Convert the whole of locore.S (assembly to enter guest and handle
      exception entry) to be generated dynamically with uasm. This is done
      with minimal changes to the resulting code.
      
      The main changes are:
      - Some constants are generated by uasm using LUI+ADDIU instead of
        LUI+ORI.
      - Loading of lo and hi are swapped around in vcpu_run but not when
        resuming the guest after an exit. Both bits of logic are now generated
        by the same code.
      - Register MOVEs in uasm use different ADDU operand ordering to GNU as,
        putting zero register into rs instead of rt.
      - The JALR.HB to call the C exit handler is switched to JALR, since the
        hazard barrier would appear to be unnecessary.
      
      This will allow further optimisation in the future to dynamically handle
      the capabilities of the CPU.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim KrÄmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      90e9311a
  6. 01 7月, 2016 1 次提交
  7. 16 6月, 2016 4 次提交
    • J
      MIPS: KVM: Add KScratch registers · 05108709
      James Hogan 提交于
      Allow up to 6 KVM guest KScratch registers to be enabled and accessed
      via the KVM guest register API and from the guest itself (the fallback
      reading and writing of commpage registers is sufficient for KScratch
      registers to work as expected).
      
      User mode can expose the registers by setting the appropriate bits of
      the guest Config4.KScrExist field. KScratch registers that aren't usable
      won't be writeable via the KVM Ioctl API.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      05108709
    • J
      MIPS: KVM: List FPU/MSA registers · e5775930
      James Hogan 提交于
      Make KVM_GET_REG_LIST list FPU & MSA registers. Specifically we list all
      32 vector registers when MSA can be enabled, 32 single-precision FP
      registers when FPU can be enabled, and either 16 or 32 double-precision
      FP registers when FPU can be enabled depending on whether FR mode is
      supported (which provides 32 doubles instead of 16 even doubles).
      
      Note, these registers may still be inaccessible depending on the current
      FP mode of the guest.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      e5775930
    • J
      MIPS: KVM: Make KVM_GET_REG_LIST dynamic · f5c43bd4
      James Hogan 提交于
      Make the implementation of KVM_GET_REG_LIST more dynamic so that only
      the subset of registers actually available can be exposed to user mode.
      This is important for VZ where some of the guest register state may not
      be possible to prevent the guest from accessing, therefore the user
      process may need to be aware of the state even if it doesn't understand
      what the state is for.
      
      This also allows different MIPS KVM implementations to provide different
      registers to one another, by way of new num_regs(vcpu) and
      copy_reg_indices(vcpu, indices) callback functions, currently just
      stubbed for trap & emulate.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      f5c43bd4
    • J
      MIPS: KVM: Pass all unknown registers to callbacks · cc68d22f
      James Hogan 提交于
      Pass all unrecognised register IDs through to the set_one_reg() and
      get_one_reg() callbacks, not just select ones. This allows
      implementation specific registers to be more easily added without having
      to modify arch/mips/kvm/mips.c.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      cc68d22f
  8. 14 6月, 2016 8 次提交
    • J
      MIPS: KVM: Add guest mode switch trace events · 93258604
      James Hogan 提交于
      Add a few trace events for entering and coming out of guest mode, as well
      as re-entering it from a guest exit exception.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: kvm@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      93258604
    • J
      MIPS: KVM: Clean up kvm_exit trace event · 1e09e86a
      James Hogan 提交于
      Clean up the MIPS kvm_exit trace event so that the exit reasons are
      specified in a trace friendly way (via __print_symbolic), and so that
      the exit reasons that derive straight from Cause.ExcCode values map
      directly, allowing a single trace_kvm_exit() call to replace a bunch of
      individual ones.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: kvm@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1e09e86a
    • J
      MIPS: KVM: Add kvm_aux trace event · 04ebebf4
      James Hogan 提交于
      Add a MIPS specific trace event for auxiliary context operations
      (notably FPU and MSA). Unfortunately the generic kvm_fpu trace event
      isn't flexible enough to handle the range of interesting things that can
      happen with FPU and MSA context.
      
      The type of state being operated on is traced:
      - FPU: Just the FPU registers.
      - MSA: Just the upper half of the MSA vector registers (low half already
             loaded with FPU state).
      - FPU & MSA: Full MSA vector state (includes FPU state).
      
      As is the type of operation:
      - Restore: State was enabled and restored.
      - Save: State was saved and disabled.
      - Enable: State was enabled (already loaded).
      - Disable: State was disabled (kept loaded).
      - Discard: State was discarded and disabled.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      [Fix remaining occurrence of "fpu_msa", change to "aux". - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      04ebebf4
    • J
      MIPS: KVM: Generalise fpu_inuse for other state · f943176a
      James Hogan 提交于
      Rename fpu_inuse and the related definitions to aux_inuse so it can be
      used for lazy context management of other auxiliary processor state too,
      such as VZ guest timer, watchpoints and performance counters.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      f943176a
    • J
      MIPS: KVM: Restore host EBase from ebase variable · 878edf01
      James Hogan 提交于
      The host kernel's exception vector base address is currently saved in
      the VCPU structure at creation time, and restored on a guest exit.
      However it doesn't change and can already be easily accessed from the
      'ebase' variable (arch/mips/kernel/traps.c), so drop the host_ebase
      member of kvm_vcpu_arch, export the 'ebase' variable to modules and load
      from there instead.
      
      This does result in a single extra instruction (lui) on the guest exit
      path, but simplifies the code a bit and removes the redundant storage of
      the host exception base address.
      
      Credit for the idea goes to Cavium's VZ KVM implementation.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      878edf01
    • J
      MIPS: KVM: Don't indirect KVM functions · 9befad23
      James Hogan 提交于
      Several KVM module functions are indirected so that they can be accessed
      from tlb.c which is statically built into the kernel. This is no longer
      necessary as the relevant bits of code have moved into mmu.c which is
      part of the KVM module, so drop the indirections.
      
      Note: is_error_pfn() is defined inline in kvm_host.h, so didn't actually
      require the KVM module to be loaded for it to work anyway.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      9befad23
    • J
      MIPS: KVM: Convert code to kernel sized types · 8cffd197
      James Hogan 提交于
      Convert the MIPS KVM C code to use standard kernel sized types (e.g.
      u32) instead of inttypes.h style ones (e.g. uint32_t) or other types as
      appropriate.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      8cffd197
    • J
      MIPS: KVM: Fix modular KVM under QEMU · 797179bc
      James Hogan 提交于
      Copy __kvm_mips_vcpu_run() into unmapped memory, so that we can never
      get a TLB refill exception in it when KVM is built as a module.
      
      This was observed to happen with the host MIPS kernel running under
      QEMU, due to a not entirely transparent optimisation in the QEMU TLB
      handling where TLB entries replaced with TLBWR are copied to a separate
      part of the TLB array. Code in those pages continue to be executable,
      but those mappings persist only until the next ASID switch, even if they
      are marked global.
      
      An ASID switch happens in __kvm_mips_vcpu_run() at exception level after
      switching to the guest exception base. Subsequent TLB mapped kernel
      instructions just prior to switching to the guest trigger a TLB refill
      exception, which enters the guest exception handlers without updating
      EPC. This appears as a guest triggered TLB refill on a host kernel
      mapped (host KSeg2) address, which is not handled correctly as user
      (guest) mode accesses to kernel (host) segments always generate address
      error exceptions.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Radim Krčmář <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: kvm@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 3.10.x-
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      797179bc
  9. 13 5月, 2016 1 次提交
    • C
      KVM: halt_polling: provide a way to qualify wakeups during poll · 3491caf2
      Christian Borntraeger 提交于
      Some wakeups should not be considered a sucessful poll. For example on
      s390 I/O interrupts are usually floating, which means that _ALL_ CPUs
      would be considered runnable - letting all vCPUs poll all the time for
      transactional like workload, even if one vCPU would be enough.
      This can result in huge CPU usage for large guests.
      This patch lets architectures provide a way to qualify wakeups if they
      should be considered a good/bad wakeups in regard to polls.
      
      For s390 the implementation will fence of halt polling for anything but
      known good, single vCPU events. The s390 implementation for floating
      interrupts does a wakeup for one vCPU, but the interrupt will be delivered
      by whatever CPU checks first for a pending interrupt. We prefer the
      woken up CPU by marking the poll of this CPU as "good" poll.
      This code will also mark several other wakeup reasons like IPI or
      expired timers as "good". This will of course also mark some events as
      not sucessful. As  KVM on z runs always as a 2nd level hypervisor,
      we prefer to not poll, unless we are really sure, though.
      
      This patch successfully limits the CPU usage for cases like uperf 1byte
      transactional ping pong workload or wakeup heavy workload like OLTP
      while still providing a proper speedup.
      
      This also introduced a new vcpu stat "halt_poll_no_tuning" that marks
      wakeups that are considered not good for polling.
      Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
      Acked-by: Radim Krčmář <rkrcmar@redhat.com> (for an earlier version)
      Cc: David Matlack <dmatlack@google.com>
      Cc: Wanpeng Li <kernellwp@gmail.com>
      [Rename config symbol. - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      3491caf2
  10. 10 5月, 2016 2 次提交
    • J
      MIPS: KVM: Add missing disable FPU hazard barriers · 4ac33429
      James Hogan 提交于
      Add the necessary hazard barriers after disabling the FPU in
      kvm_lose_fpu(), just to be safe.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      4ac33429
    • J
      MIPS: KVM: Fix preemption warning reading FPU capability · 556f2a52
      James Hogan 提交于
      Reading the KVM_CAP_MIPS_FPU capability returns cpu_has_fpu, however
      this uses smp_processor_id() to read the current CPU capabilities (since
      some old MIPS systems could have FPUs present on only a subset of CPUs).
      
      We don't support any such systems, so work around the warning by using
      raw_cpu_has_fpu instead.
      
      We should probably instead claim not to support FPU at all if any one
      CPU is lacking an FPU, but this should do for now.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      556f2a52
  11. 02 3月, 2016 1 次提交
    • M
      mips/kvm: fix ioctl error handling · 0178fd7d
      Michael S. Tsirkin 提交于
      Returning directly whatever copy_to_user(...) or copy_from_user(...)
      returns may not do the right thing if there's a pagefault:
      copy_to_user/copy_from_user return the number of bytes not copied in
      this case, but ioctls need to return -EFAULT instead.
      
      Fix up kvm on mips to do
      	return copy_to_user(...)) ?  -EFAULT : 0;
      and
      	return copy_from_user(...)) ?  -EFAULT : 0;
      
      everywhere.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0178fd7d
  12. 29 2月, 2016 1 次提交
  13. 25 2月, 2016 1 次提交
    • M
      KVM: Use simple waitqueue for vcpu->wq · 8577370f
      Marcelo Tosatti 提交于
      The problem:
      
      On -rt, an emulated LAPIC timer instances has the following path:
      
      1) hard interrupt
      2) ksoftirqd is scheduled
      3) ksoftirqd wakes up vcpu thread
      4) vcpu thread is scheduled
      
      This extra context switch introduces unnecessary latency in the
      LAPIC path for a KVM guest.
      
      The solution:
      
      Allow waking up vcpu thread from hardirq context,
      thus avoiding the need for ksoftirqd to be scheduled.
      
      Normal waitqueues make use of spinlocks, which on -RT
      are sleepable locks. Therefore, waking up a waitqueue
      waiter involves locking a sleeping lock, which
      is not allowed from hard interrupt context.
      
      cyclictest command line:
      
      This patch reduces the average latency in my tests from 14us to 11us.
      
      Daniel writes:
      Paolo asked for numbers from kvm-unit-tests/tscdeadline_latency
      benchmark on mainline. The test was run 1000 times on
      tip/sched/core 4.4.0-rc8-01134-g0905f04e:
      
        ./x86-run x86/tscdeadline_latency.flat -cpu host
      
      with idle=poll.
      
      The test seems not to deliver really stable numbers though most of
      them are smaller. Paolo write:
      
      "Anything above ~10000 cycles means that the host went to C1 or
      lower---the number means more or less nothing in that case.
      
      The mean shows an improvement indeed."
      
      Before:
      
                     min             max         mean           std
      count  1000.000000     1000.000000  1000.000000   1000.000000
      mean   5162.596000  2019270.084000  5824.491541  20681.645558
      std      75.431231   622607.723969    89.575700   6492.272062
      min    4466.000000    23928.000000  5537.926500    585.864966
      25%    5163.000000  16132529.750000  5790.132275  16683.745433
      50%    5175.000000  2281919.000000  5834.654000  23151.990026
      75%    5190.000000  2382865.750000  5861.412950  24148.206168
      max    5228.000000  4175158.000000  6254.827300  46481.048691
      
      After
                     min            max         mean           std
      count  1000.000000     1000.00000  1000.000000   1000.000000
      mean   5143.511000  2076886.10300  5813.312474  21207.357565
      std      77.668322   610413.09583    86.541500   6331.915127
      min    4427.000000    25103.00000  5529.756600    559.187707
      25%    5148.000000  1691272.75000  5784.889825  17473.518244
      50%    5160.000000  2308328.50000  5832.025000  23464.837068
      75%    5172.000000  2393037.75000  5853.177675  24223.969976
      max    5222.000000  3922458.00000  6186.720500  42520.379830
      
      [Patch was originaly based on the swait implementation found in the -rt
       tree. Daniel ported it to mainline's version and gathered the
       benchmark numbers for tscdeadline_latency test.]
      Signed-off-by: NDaniel Wagner <daniel.wagner@bmw-carit.de>
      Acked-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: linux-rt-users@vger.kernel.org
      Cc: Boqun Feng <boqun.feng@gmail.com>
      Cc: Marcelo Tosatti <mtosatti@redhat.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
      Link: http://lkml.kernel.org/r/1455871601-27484-4-git-send-email-wagi@monom.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      8577370f
  14. 24 1月, 2016 3 次提交
  15. 18 11月, 2015 1 次提交
    • J
      MIPS: KVM: Uninit VCPU in vcpu_create error path · 585bb8f9
      James Hogan 提交于
      If either of the memory allocations in kvm_arch_vcpu_create() fail, the
      vcpu which has been allocated and kvm_vcpu_init'd doesn't get uninit'd
      in the error handling path. Add a call to kvm_vcpu_uninit() to fix this.
      
      Fixes: 669e846e ("KVM/MIPS32: MIPS arch specific APIs for KVM")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Gleb Natapov <gleb@kernel.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: <stable@vger.kernel.org> # 3.10.x-
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      585bb8f9
  16. 16 9月, 2015 1 次提交
    • P
      KVM: add halt_attempted_poll to VCPU stats · 62bea5bf
      Paolo Bonzini 提交于
      This new statistic can help diagnosing VCPUs that, for any reason,
      trigger bad behavior of halt_poll_ns autotuning.
      
      For example, say halt_poll_ns = 480000, and wakeups are spaced exactly
      like 479us, 481us, 479us, 481us. Then KVM always fails polling and wastes
      10+20+40+80+160+320+480 = 1110 microseconds out of every
      479+481+479+481+479+481+479 = 3359 microseconds. The VCPU then
      is consuming about 30% more CPU than it would use without
      polling.  This would show as an abnormally high number of
      attempted polling compared to the successful polls.
      
      Acked-by: Christian Borntraeger <borntraeger@de.ibm.com<
      Reviewed-by: NDavid Matlack <dmatlack@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      62bea5bf
  17. 28 5月, 2015 1 次提交
  18. 26 5月, 2015 2 次提交
  19. 20 5月, 2015 1 次提交
  20. 07 5月, 2015 1 次提交
  21. 28 3月, 2015 2 次提交
    • J
      MIPS: KVM: Wire up MSA capability · d952bd07
      James Hogan 提交于
      Now that the code is in place for KVM to support MIPS SIMD Architecutre
      (MSA) in MIPS guests, wire up the new KVM_CAP_MIPS_MSA capability.
      
      For backwards compatibility, the capability must be explicitly enabled
      in order to detect or make use of MSA from the guest.
      
      The capability is not supported if the hardware supports MSA vector
      partitioning, since the extra support cannot be tested yet and it
      extends the state that the userland program would have to save.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Gleb Natapov <gleb@kernel.org>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: linux-api@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      d952bd07
    • J
      MIPS: KVM: Expose MSA registers · ab86bd60
      James Hogan 提交于
      Add KVM register numbers for the MIPS SIMD Architecture (MSA) registers,
      and implement access to them with the KVM_GET_ONE_REG / KVM_SET_ONE_REG
      ioctls when the MSA capability is enabled (exposed in a later patch) and
      present in the guest according to its Config3.MSAP bit.
      
      The MSA vector registers use the same register numbers as the FPU
      registers except with a different size (128bits). Since MSA depends on
      Status.FR=1, these registers are inaccessible when Status.FR=0. These
      registers are returned as a single native endian 128bit value, rather
      than least significant half first with each 64-bit half native endian as
      the kernel uses internally.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Gleb Natapov <gleb@kernel.org>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: linux-api@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      ab86bd60