- 24 10月, 2010 40 次提交
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由 Avi Kivity 提交于
Like DIV and IDIV. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Use the new byte/word dual opcode decode. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Many x86 instructions come in byte and word variants distinguished with bit 0 of the opcode. Add macros to aid in defining them. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
SrcMemFAddr is not defined with the modrm operand designating a register instead of a memory address. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Gleb Natapov 提交于
x86_emulate_insn() will return 1 if instruction can be restarted without re-entering a guest. Signed-off-by: NGleb Natapov <gleb@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Gleb Natapov 提交于
Signed-off-by: NGleb Natapov <gleb@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Gleb Natapov 提交于
Signed-off-by: NGleb Natapov <gleb@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Wei Yongjun 提交于
Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Wei Yongjun 提交于
Add JrCXZ instruction emulation (opcode 0xe3) Used by FreeBSD boot loader. Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Wei Yongjun 提交于
Add LDS/LES/LFS/LGS/LSS instruction emulation. (opcode 0xc4, 0xc5, 0x0f 0xb2, 0x0f 0xb4~0xb5) Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Needed for 3-operand IMUL. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Useless. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Used for RET NEAR instructions. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Most x86 two operand instructions allow the destination to be a memory operand, but IMUL (for example) requires that the destination be a register. Change ____emulate_2op() to take a register for both source and destination so we can invoke IMUL. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
We'll need it later so we can use a register for the destination. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Add LOOP/LOOPcc instruction emulation (opcode 0xe0~0xe2). Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Add CBW/CWDE/CDQE instruction emulation.(opcode 0x98) Used by FreeBSD's boot loader. Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
EFLAGS.ZF needs to be checked after each iteration, not before. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Avi Kivity 提交于
emulate_push() only schedules a push; it doesn't actually push anything. Call writeback() to flush out the write. Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Change OUT instruction to use dst instead of src, so we can reuse those code for all out instructions. Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Introduce DstImmUByte for dst operand decode, which will be used for out instruction. Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Wei Yongjun 提交于
Add setcc instruction emulation (opcode 0x0f 0x90~0x9f) Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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