1. 11 1月, 2017 1 次提交
  2. 07 1月, 2017 1 次提交
  3. 20 12月, 2016 1 次提交
    • P
      drm/i915: fully apply WaSkipStolenMemoryFirstPage · 3c6b29b2
      Paulo Zanoni 提交于
      Don't even tell the mm allocator to handle the first page of stolen on
      the affected platforms. This means that we won't inherit the FB in
      case the BIOS decides to put it at the start of stolen. But the BIOS
      should not be putting it at the start of stolen since it's going to
      get corrupted. I suppose the bug here is that some pixels at the very
      top of the screen will be corrupted, so it's not exactly easy to
      notice.
      
      We have confirmation that the first page of stolen does actually get
      corrupted, so I really think we should do this in order to avoid any
      possible future headaches, even if that means losing BIOS framebuffer
      inheritance. Let's not use the HW in a way it's not supposed to be
      used.
      
      Notice that now ggtt->stolen_usable_size won't reflect the ending
      address of the stolen usable range anymore, so we have to fix the
      places that rely on this. To simplify, we'll just use U64_MAX.
      
      v2: don't even put the first page on the mm (Chris)
      v3: drm_mm_init() takes size instead of end as argument (Ville)
      v4: add a comment explaining the reserved ranges (Chris)
          use 0 for start and U64_MAX for end when possible (Chris)
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/1481808235-27607-1-git-send-email-paulo.r.zanoni@intel.com
      3c6b29b2
  4. 29 11月, 2016 1 次提交
  5. 17 11月, 2016 2 次提交
  6. 11 11月, 2016 1 次提交
  7. 01 11月, 2016 1 次提交
  8. 29 10月, 2016 3 次提交
  9. 14 10月, 2016 1 次提交
  10. 12 10月, 2016 1 次提交
  11. 22 8月, 2016 1 次提交
  12. 20 8月, 2016 1 次提交
  13. 19 8月, 2016 4 次提交
  14. 15 8月, 2016 6 次提交
  15. 11 8月, 2016 1 次提交
    • V
      drm/i915: Rewrite fb rotation GTT handling · 6687c906
      Ville Syrjälä 提交于
      Redo the fb rotation handling in order to:
      - eliminate the NV12 special casing
      - handle fb->offsets[] properly
      - make the rotation handling easier for the plane code
      
      To achieve these goals we reduce intel_rotation_info to only contain
      (for each plane) the rotated view width,height,stride in tile units,
      and the page offset into the object where the plane starts. Each plane
      is handled exactly the same way, no special casing for NV12 or other
      formats. We then store the computed rotation_info under
      intel_framebuffer so that we don't have to recompute it again.
      
      To handle fb->offsets[] we treat them as a linear offsets and convert
      them to x/y offsets from the start of the relevant GTT mapping (either
      normal or rotated). We store the x/y offsets under intel_framebuffer,
      and for some extra convenience we also store the rotated pitch (ie.
      tile aligned plane height). So for each plane we have the normal
      x/y offsets, rotated x/y offsets, and the rotated pitch. The normal
      pitch is available already in fb->pitches[].
      
      While we're gathering up all that extra information, we can also easily
      compute the storage requirements for the framebuffer, so that we can
      check that the object is big enough to hold it.
      
      When it comes time to deal with the plane source coordinates, we first
      rotate the clipped src coordinates to match the relevant GTT view
      orientation, then add to them the fb x/y offsets. Next we compute
      the aligned surface page offset, and as a result we're left with some
      residual x/y offsets. Finally, if required by the hardware, we convert
      the remaining x/y offsets into a linear offset.
      
      For gen2/3 we simply skip computing the final page offset, and just
      convert the src+fb x/y offsets directly into a linear offset since
      that's what the hardware wants.
      
      After this all platforms, incluing SKL+, compute these things in exactly
      the same way (excluding alignemnt differences).
      
      v2: Use BIT(DRM_ROTATE_270) instead of ROTATE_270 when rotating
          plane src coordinates
          Drop some spurious changes that got left behind during
          development
      v3: Split out more changes to prep patches (Daniel)
          s/intel_fb->plane[].foo.bar/intel_fb->foo[].bar/ for brevity
          Rename intel_surf_gtt_offset to intel_fb_gtt_offset
          Kill the pointless 'plane' parameter from intel_fb_gtt_offset()
      v4: Fix alignment vs. alignment-1 when calling
          _intel_compute_tile_offset() from intel_fill_fb_info()
          Pass the pitch in tiles in
          stad of pixels to intel_adjust_tile_offset() from intel_fill_fb_info()
          Pass the full width/height of the rotated area to
          drm_rect_rotate() for clarity
          Use u32 for more offsets
      v5: Preserve the upper_32_bits()/lower_32_bits() handling for the
          fb ggtt offset (Sivakumar)
      v6: Rebase due to drm_plane_state src/dst rects
      
      Cc: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1470821001-25272-2-git-send-email-ville.syrjala@linux.intel.comAcked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6687c906
  16. 05 8月, 2016 5 次提交
  17. 04 8月, 2016 8 次提交
  18. 20 7月, 2016 1 次提交