1. 22 8月, 2016 7 次提交
    • L
      drm/i915/skl: Add support for the SAGV, fix underrun hangs · f4033726
      Lyude 提交于
      Since the watermark calculations for Skylake are still broken, we're apt
      to hitting underruns very easily under multi-monitor configurations.
      While it would be lovely if this was fixed, it's not. Another problem
      that's been coming from this however, is the mysterious issue of
      underruns causing full system hangs. An easy way to reproduce this with
      a skylake system:
      
      - Get a laptop with a skylake GPU, and hook up two external monitors to
        it
      - Move the cursor from the built-in LCD to one of the external displays
        as quickly as you can
      - You'll get a few pipe underruns, and eventually the entire system will
        just freeze.
      
      After doing a lot of investigation and reading through the bspec, I
      found the existence of the SAGV, which is responsible for adjusting the
      system agent voltage and clock frequencies depending on how much power
      we need. According to the bspec:
      
      "The display engine access to system memory is blocked during the
       adjustment time. SAGV defaults to enabled. Software must use the
       GT-driver pcode mailbox to disable SAGV when the display engine is not
       able to tolerate the blocking time."
      
      The rest of the bspec goes on to explain that software can simply leave
      the SAGV enabled, and disable it when we use interlaced pipes/have more
      then one pipe active.
      
      Sure enough, with this patchset the system hangs resulting from pipe
      underruns on Skylake have completely vanished on my T460s. Additionally,
      the bspec mentions turning off the SAGV	with more then one pipe enabled
      as a workaround for display underruns. While this patch doesn't entirely
      fix that, it looks like it does improve the situation a little bit so
      it's likely this is going to be required to make watermarks on Skylake
      fully functional.
      
      This will still need additional work in the future: we shouldn't be
      enabling the SAGV if any of the currently enabled planes can't enable WM
      levels that introduce latencies >= 30 µs.
      
      Changes since v11:
       - Add skl_can_enable_sagv()
       - Make sure we don't enable SAGV when not all planes can enable
         watermarks >= the SAGV engine block time. I was originally going to
         save this for later, but I recently managed to run into a machine
         that was having problems with a single pipe configuration + SAGV.
       - Make comparisons to I915_SKL_SAGV_NOT_CONTROLLED explicit
       - Change I915_SAGV_DYNAMIC_FREQ to I915_SAGV_ENABLE
       - Move printks outside of mutexes
       - Don't print error messages twice
      Changes since v10:
       - Apparently sandybridge_pcode_read actually writes values and reads
         them back, despite it's misleading function name. This means we've
         been doing this mostly wrong and have been writing garbage to the
         SAGV control. Because of this, we no longer attempt to read the SAGV
         status during initialization (since there are no helpers for this).
       - mlankhorst noticed that this patch was breaking on some very early
         pre-release Skylake machines, which apparently don't allow you to
         disable the SAGV. To prevent machines from failing tests due to SAGV
         errors, if the first time we try to control the SAGV results in the
         mailbox indicating an invalid command, we just disable future attempts
         to control the SAGV state by setting dev_priv->skl_sagv_status to
         I915_SKL_SAGV_NOT_CONTROLLED and make a note of it in dmesg.
       - Move mutex_unlock() a little higher in skl_enable_sagv(). This
         doesn't actually fix anything, but lets us release the lock a little
         sooner since we're finished with it.
      Changes since v9:
       - Only enable/disable sagv on Skylake
      Changes since v8:
       - Add intel_state->modeset guard to the conditional for
         skl_enable_sagv()
      Changes since v7:
       - Remove GEN9_SAGV_LOW_FREQ, replace with GEN9_SAGV_IS_ENABLED (that's
         all we use it for anyway)
       - Use GEN9_SAGV_IS_ENABLED instead of 0x1 for clarification
       - Fix a styling error that snuck past me
      Changes since v6:
       - Protect skl_enable_sagv() with intel_state->modeset conditional in
         intel_atomic_commit_tail()
      Changes since v5:
       - Don't use is_power_of_2. Makes things confusing
       - Don't use the old state to figure out whether or not to
         enable/disable the sagv, use the new one
       - Split the loop in skl_disable_sagv into it's own function
       - Move skl_sagv_enable/disable() calls into intel_atomic_commit_tail()
      Changes since v4:
       - Use is_power_of_2 against active_crtcs to check whether we have > 1
         pipe enabled
       - Fix skl_sagv_get_hw_state(): (temp & 0x1) indicates disabled, 0x0
         enabled
       - Call skl_sagv_enable/disable() from pre/post-plane updates
      Changes since v3:
       - Use time_before() to compare timeout to jiffies
      Changes since v2:
       - Really apply minor style nitpicks to patch this time
      Changes since v1:
       - Added comments about this probably being one of the requirements to
         fixing Skylake's watermark issues
       - Minor style nitpicks from Matt Roper
       - Disable these functions on Broxton, since it doesn't have an SAGV
      Signed-off-by: NLyude <cpaul@redhat.com>
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1471463761-26796-3-git-send-email-cpaul@redhat.com
      [mlankhorst: ENOSYS -> ENXIO, whitespace fixes]
      
      (cherry picked from commit 656d1b89)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      f4033726
    • L
      drm/i915/gen6+: Interpret mailbox error flags · 5bc6abe7
      Lyude 提交于
      In order to add proper support for the SAGV, we need to be able to know
      what the cause of a failure to change the SAGV through the pcode mailbox
      was. The reasoning for this is that some very early pre-release Skylake
      machines don't actually allow you to control the SAGV on them, and
      indicate an invalid mailbox command was sent.
      
      This also might come in handy in the future for debugging.
      
      Changes since v1:
       - Add functions for interpreting gen6 mailbox error codes along with
         gen7+ error codes, and actually interpret those codes properly
       - Renamed patch to reflect new behavior
      Signed-off-by: NLyude <cpaul@redhat.com>
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1471463761-26796-2-git-send-email-cpaul@redhat.com
      [mlankhorst: -ENOSYS -> -ENXIO for checkpatch]
      
      (cherry picked from commit 87660502)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      5bc6abe7
    • D
      drm/i915: Reattach comment, complete type specification · 0184c2ff
      Dave Gordon 提交于
      In the recent patch
      bc3d6744 drm/i915: Allow userspace to request no-error-capture upon ...
      the final version moved the flags and the associated #defines around
      so they were adjacent; unfortunately, they ended up between a comment
      and the thing (hw_id) to which the comment applies :(
      
      So this patch reshuffles the comment and subject back together.
      
      Also, as we're touching 'hw_id', let's change it from just 'unsigned'
      to a fully-specified 'unsigned int', because some code checking tools
      (including checkpatch) object to plain 'unsigned'.
      
      Fixes: bc3d6744 ("drm/i915: Allow userspace to request no-error-capture...")
      Signed-off-by: NDave Gordon <david.s.gordon@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/1471616622-6919-1-git-send-email-david.s.gordon@intel.comReviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      (cherry picked from commit 0be81156)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      0184c2ff
    • C
      drm/i915: Unconditionally flush any chipset buffers before execbuf · dcd79934
      Chris Wilson 提交于
      If userspace is asynchronously streaming into the batch or other
      execobjects, we may not flush those writes along with a change in cache
      domain (as there is no change). Therefore those writes may end up in
      internal chipset buffers and not visible to the GPU upon execution. We
      must issue a flush command or otherwise we encounter incoherency in the
      batchbuffers and the GPU executing invalid commands (i.e. hanging) quite
      regularly.
      
      v2: Throw a paranoid wmb() into the general flush so that we remain
      consistent with before.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90841
      Fixes: 1816f923 ("drm/i915: Support creation of unbound wc user...")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Akash Goel <akash.goel@intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Tested-by: NMatti Hämäläinen <ccr@tnsp.org>
      Cc: stable@vger.kernel.org
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-1-chris@chris-wilson.co.uk
      (cherry picked from commit 600f4368)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      dcd79934
    • M
      drm/i915/gen9: Drop invalid WARN() during data rate calculation · c7aca235
      Matt Roper 提交于
      It's possible to have a non-zero plane mask and still wind up with a
      total data rate of zero.  There are two cases where this can happen:
      
       * planes are active (from the KMS point of view), but are
         all fully clipped (positioned offscreen)
       * the only active plane on a CRTC is the cursor (which is handled
         independently and not counted into the general data rate computations
      
      These are both valid display setups (although unusual), so we need to
      drop the WARN().
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Testcase: kms_universal_planes.cursor-only-pipe-*
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1466196140-16336-4-git-send-email-matthew.d.roper@intel.com
      Cc: stable@vger.kernel.org #v4.7+
      (cherry picked from commit 43aa7e87)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      c7aca235
    • M
      drm/i915/gen9: Initialize intel_state->active_crtcs during WM sanitization (v2) · f4750a46
      Matt Roper 提交于
      intel_state->active_crtcs is usually only initialized when doing a
      modeset.  During our first atomic commit after boot, we're effectively
      faking a modeset to sanitize the DDB/wm setup, so ensure that this field
      gets initialized before use.
      
      v2:
       - Don't clobber active_crtcs if our first commit really is a modeset
         (Maarten)
       - Grab connection_mutex when faking a modeset during sanitization
         (Maarten)
      Reported-by: NTvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Tested-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1466196140-16336-2-git-send-email-matthew.d.roper@intel.com
      Cc: stable@vger.kernel.org #v4.7+
      (cherry picked from commit 1b54a880)
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      f4750a46
    • T
      EDAC, skx_edac: Add EDAC driver for Skylake · 4ec656bd
      Tony Luck 提交于
      This is an entirely new driver instead of yet another set of patches
      to sb_edac.c because:
      
      1) Mapping from PCI devices to socket/memory controller is significantly
         different. Skylake scatters devices on a socket across a number of
         PCI buses.
      2) There is an extra level of interleaving via the "mcroute" register
         that would be a little messy to squeeze into the old driver.
      3) Validation is getting too expensive. Changes to sb_edac need to
         be checked against Sandy Bridge, Ivy Bridge, Haswell, Broadwell and
         Knights Landing.
      Acked-by: NAristeu Rozanski <aris@redhat.com>
      Acked-by: NBorislav Petkov <bp@suse.de>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      4ec656bd
  2. 18 8月, 2016 12 次提交
  3. 17 8月, 2016 13 次提交
  4. 16 8月, 2016 8 次提交