Add support for the B and C planes which support RGB and YUV pixel
formats and can be used as overlays or hardware cursor. Currently 32-bit
XRGB as well as UYVY, YUV420 and YUV422 pixel formats are advertised.
Other formats should be easy to add but these are the most common ones
and should cover the majority of use-cases.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Tegra uses the CMA FB helpers so framebuffers passed to the driver need
to use the corresponding functions to access the underlying GEM objects.

This used to work because struct tegra_framebuffer was sufficiently
similar to struct drm_fb_cma but that isn't guaranteed to stay that way.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

drm_fbdev_cma_init does the inital fbcon setup by calling down into
drm_fb_helper_initial_config, so no need at all to restore the just
set up configuration right away ...
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

This reverts commit 83c0bcb6.

Lucas pointed out this was a mistake, and I missed the discussion,
so just revert it out to save a rebase.
Signed-off-by: NDave Airlie <airlied@redhat.com>

The intention is to program exactly WIN_A, not WIN_A and possibly
others.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

There is no gem.c anymore, those functions are implemented by the
drm_cma_helpers now.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The 720p and 1080p entries are completely redundant, as we are matching
the table entries against <=pclk.
Also generalize the comment, as we are using those table entries even
when driving other modes than the standard TV ones.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Window properties are programmed through a shared aperture and have to
happen atomically. Also we do the read-update-write dance on some of the
shared regs.
To make sure that different functions don't stumble over each other
protect the register access with a mutex.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

No real problem for now, as nothing is using this, but leaving it
unitialized is asking for trouble later on.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Fixes wrong picture offset observed when using HDMI output with a
Technisat HD TV.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Acked-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Add support for host1x, the display controllers and HDMI on the Tegra30
SoC.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Instead of using the stride derived from the display mode, use the pitch
associated with the currently active framebuffer. This fixes a bug where
the LCD display content would be skewed when enabling HDMI with a video
mode different from that of the LCD.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This commit adds support for the HDMI output on the Tegra20 SoC. Only
one such output is available, but it can be driven by either of the two
display controllers.

A lot of work on this patch has been contributed by NVIDIA's Mark Zhang
<markz@nvidia.com> and many other people at NVIDIA were very helpful in
getting the HDMI support and surrounding infrastructure to work.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Zhang <markz@nvidia.com>
Reviewed-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This commit adds a KMS driver for the Tegra20 SoC. This includes basic
support for host1x and the two display controllers found on the Tegra20
SoC. Each display controller can drive a separate RGB/LVDS output.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Zhang <markz@nvidia.com>
Reviewed-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>