- 01 8月, 2011 6 次提交
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
This removes the last device from devices.c. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Additionally make the usb related defines consistent with the other imx SoCs. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 31 7月, 2011 14 次提交
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由 Greg Dietsche 提交于
Remove unnecessary code that matches this coccinelle pattern if (...) return ret; return ret; Signed-off-by: NGreg Dietsche <Gregory.Dietsche@cuw.edu> Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
It's been unused for ages, and contains bugs (e.g. incorrect shifts in lsl64()). Reported-by: NJonathan Elchison <jelchison@gmail.com> Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
arch/m68k/kernel/setup_mm.c: In function ‘setup_arch’: arch/m68k/kernel/setup_mm.c:219: warning: unused variable ‘i’ Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
These defines are way to generic, and cause conflicts: drivers/net/wireless/rtlwifi/rtl8192c/../rtl8192ce/reg.h:369:1: warning: "GPIO_IN" redefined drivers/net/wireless/rtlwifi/rtl8192c/../rtl8192ce/reg.h:370:1: warning: "GPIO_OUT" redefined drivers/net/wireless/rtlwifi/rtl8192se/reg.h:252:1: warning: "GPIO_IN" redefined drivers/net/wireless/rtlwifi/rtl8192se/reg.h:253:1: warning: "GPIO_OUT" redefined Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
Replace a custom implementation (which doesn't lock the resource tree) by a call to lookup_resource() Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Schmitz 提交于
Based on an original patch from Michael Schmitz: Because mem_init() is now called before device init, devices that rely on ST-RAM may find all ST-RAM already allocated to other users by the time device init happens. In particular, a large initrd RAM disk may use up enough of ST-RAM to cause atari_stram_alloc() to resort to __get_dma_pages() allocation. In the current state of Atari memory management, all of RAM is marked DMA capable, so __get_dma_pages() may well return RAM that is not in actual fact DMA capable. Using this for frame buffer or SCSI DMA buffer causes subtle failure. The ST-RAM allocator has been changed to allocate memory from a pool of reserved ST-RAM of configurable size, set aside on ST-RAM init (i.e. before mem_init()). As long as this pool is not exhausted, allocation of real ST-RAM can be guaranteed. Other changes: - Replace the custom allocator in the ST-RAM pool by the existing allocator in the resource subsystem, - Remove mem_init_done and its hook, as memory init is now done before device init, - Remove /proc/stram, as ST-RAM usage now shows up under /proc/iomem, e.g. 005f2000-006f1fff : ST-RAM Pool 005f2000-0063dfff : atafb 0063e000-00641fff : ataflop 00642000-00642fff : SCSI Signed-off-by: NMichael Schmitz <schmitz@debian.org> [Andreas Schwab <schwab@linux-m68k.org>: Use memparse()] [Geert: Use the resource subsystem instead of a custom allocator] Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
Replace a custom implementation (which doesn't lock the resource tree) by a call to lookup_resource() Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
The address that's passed to _sparc_find_resource() should always be the start address of a resource: - iounmap() passes a page-aligned virtual address, while the original address was created by adding the in-page offset to the resource's start address, - sbus_free_coherent() and pci32_free_coherent() should be passed an address obtained from sbus_alloc_coherent() resp. pci32_alloc_coherent(), which is always a resource's start address. Hence replace the range check by a check for an exact match. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NDavid S. Miller <davem@davemloft.net>
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由 Geert Uytterhoeven 提交于
Technically, the end of Chip RAM should be offset by CHIP_PHYSADDR (which is zero). Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
While the core resource handling code is safe, our global counter must still be protected against concurrent modifications. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
As of commit 5df1abdb ('m68k/amiga: Fix "debug=mem"'), "debug=mem" no longer uses amiga_chip_alloc_res(), so we can remove the hack to prefer memory at the safe end. This allows to simplify the code and make amiga_chip_alloc() just call amiga_chip_alloc_res() internally. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
and fix a few formattings: - resource sizes are now resource_size_t, use %pR to make it future proof, - use %lu for unsigned long. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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- 30 7月, 2011 1 次提交
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由 Greg Dietsche 提交于
remove unnecessary code that matches this coccinelle pattern if (...) return ret; return ret; Signed-off-by: NGreg Dietsche <Gregory.Dietsche@cuw.edu> Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 7月, 2011 1 次提交
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由 Arnd Bergmann 提交于
My previous commit left the file empty and present in the Makefile, which is a bit dirty and caused problems with 'make distclean', as pointed out by David Howells. This hopefully cleans it up the right way. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NDavid Howells <dhowells@redhat.com> Acked-by: NJohn Linn <john.linn@xilinx.com>
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- 28 7月, 2011 18 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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to make the soc base specified at runtime instead of compiled time Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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they are the same except the default priority Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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由 Grant Likely 提交于
Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
For testing the dt work, define a dt-enabled versatile platform. This patch adds a new versatile platform for when using the device tree. Add platform and amba devices are discovered and registered by parsing the device tree. Clocks and initial io mappings are still configured statically. This patch still depends on some static platform_data for a few devices which is passed via the auxdata structure to of_platform_populate(), but it is a viable starting point until the drivers can get all configuration data out of the device tree. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
This patch adds irq_domain infrastructure for translating from hardware irq numbers to linux irqs. This is particularly important for architectures adding device tree support because the current implementation (excluding PowerPC and SPARC) cannot handle translation for more than a single interrupt controller. irq_domain supports device tree translation for any number of interrupt controllers. This patch converts x86, Microblaze, ARM and MIPS to use irq_domain for device tree irq translation. x86 is untested beyond compiling it, irq_domain is enabled for MIPS and Microblaze, but the old behaviour is preserved until the core code is modified to actually register an irq_domain yet. On ARM it works and is required for much of the new ARM device tree board support. PowerPC has /not/ been converted to use this new infrastructure. It is still missing some features before it can replace the virq infrastructure already in powerpc (see documentation on irq_domain_map/unmap for details). Followup patches will add the missing pieces and migrate PowerPC to use irq_domain. SPARC has its own method of managing interrupts from the device tree and is unaffected by this change. Acked-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 David S. Miller 提交于
The cpu compatible string we look for is "SPARC-T3". As far as memset/memcpy optimizations go, we treat this chip the same as Niagara-T2/T2+. Use cache initializing stores for memset, and use perfetch, FPU block loads, cache initializing stores, and block stores for copies. We use the Niagara-T2 perf support, since T3 is a close relative in this regard. Later we'll add support for the new events T3 can report, plus enable T3's new "sample" mode. For now I haven't added any new ELF hwcap flags. We probably need to add a couple, for example: T2 and T3 both support the population count instruction in hardware. T3 supports VIS3 instructions, including support (finally) for partitioned shift. One can also now move directly between float and integer registers. T3 supports instructions meant to help with Galois Field and other HPC calculations, such as XOR multiply. Also there are "OP and negate" instructions, for example "fnmul" which is multiply-and-negate. T3 recognizes the transactional memory opcodes, however since transactional memory isn't supported: 1) 'commit' behaves as a NOP and 2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps' behaves as a NOP. So we'll need about 3 new elf capability flags in the end to represent all of these things. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
The hypervisor call is only necessary if hypervisor events are being requested. So if we're not tracking hypervisor events, simply do a direct register write. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Otherwise we'll crash in the sparc perf init code. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guennadi Liakhovetski 提交于
Now that v4l2 subdevices have got their own device objects, having one more device in soc-camera clients became redundant and confusing. This patch removes those devices and the soc-camera bus, they used to reside on. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Guennadi Liakhovetski 提交于
This moves us one more step closer to eliminating the soc-camera bus and devices on it. Besides, as a side effect, CSI-2 runtime PM on sh-mobile secomes finer grained now: we only have to power on the interface, when the device nodes are open. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Kalle Jokiniemi 提交于
The RX-51 uses the CSIb IO complex for camera operation. The board file is missing definition for the regulator supplying the CSIb complex, so this is added for better power management. Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@nokia.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSakari Ailus <sakari.ailus@iki.fi> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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