1. 16 7月, 2013 1 次提交
  2. 18 6月, 2013 1 次提交
  3. 07 6月, 2013 1 次提交
  4. 04 5月, 2013 1 次提交
  5. 10 4月, 2013 1 次提交
  6. 30 3月, 2013 1 次提交
    • S
      ARM: tegra: convert to multi-platform · 90027225
      Stephen Warren 提交于
      This allows Tegra be included in a kernel build that supports multiple
      SoCs at once, which is useful for distro kernels.
      
      This change:
      * Moves Tegra's Kconfig into its own directory, as seems typical for
        multi-platform conversions.
      * Stops selecting some ARM errata that are incompatible with multi-
        platform. This requires that you use a bootloader that enables the
        workaround!
      * Deletes some headers and Makefile.boot that aren't needed now that we
        support multi-platform.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      90027225
  7. 21 3月, 2013 1 次提交
  8. 10 2月, 2013 2 次提交
  9. 30 1月, 2013 1 次提交
  10. 29 1月, 2013 3 次提交
    • H
      ARM: tegra: Add initial support for Tegra114 SoC. · 5c541b88
      Hiroshi Doyu 提交于
      Add new Tegra 114 SoC support.
      Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      5c541b88
    • J
      ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode · 1d328606
      Joseph Lo 提交于
      The "powered-down" cpuidle mode of Tegra20 needs the CPU0 be the last one
      core to go into this mode before other core. The coupled cpuidle framework
      can help to sync the MPCore to coupled state then go into "powered-down"
      idle mode together. The driver can just assume the MPCore come into
      "powered-down" mode at the same time. No need to take care if the CPU_0
      goes into this mode along and only can put it into safe idle mode (WFI).
      
      The powered-down state of Tegra20 requires power gating both CPU cores.
      When the secondary CPU requests to enter powered-down state, it saves
      its own contexts and then enters WFI for waiting CPU0 in the same state.
      When the CPU0 requests powered-down state, it attempts to put the secondary
      CPU into reset to prevent it from waking up. Then power down both CPUs
      together and power off the cpu rail.
      
      Be aware of that, you may see the legacy power state "LP2" in the code
      which is exactly the same meaning of "CPU power down".
      
      Based on the work by:
      Colin Cross <ccross@android.com>
      Gary King <gking@nvidia.com>
      Signed-off-by: NJoseph Lo <josephl@nvidia.com>
      Acked-by: NColin Cross <ccross@android.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      1d328606
    • S
      ARM: tegra: fix Kconfig warnings when !SMP · 45c9e592
      Stephen Warren 提交于
      Fix:
      
      warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP)
      warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP)
      
      by selecting options only if SMP.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      45c9e592
  11. 03 12月, 2012 1 次提交
  12. 17 11月, 2012 2 次提交
    • S
      ARM: tegra: move debug-macro.S to include/debug · 46067803
      Stephen Warren 提交于
      Move Tegra's debug-macro.S over to the common debug macro directory.
      
      Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
      all related options are selected in the same place.
      
      Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
      removed whenever Tegra is converted to multi-platform.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      46067803
    • S
      ARM: tegra: simplify DEBUG_LL UART selection options · adc18315
      Stephen Warren 提交于
      Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
      * No upstream bootloader currently or will ever support this option.
      * CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
      
      Merge the fixed and automatic UART selection menus into a single choice
      for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
      rather than potentially having an AUTO option override whatever fixed
      option was chosen.
      
      Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
      simply don't turn on DEBUG_LL. NONE used to be the default option, so
      pick AUTO_ODMDATA as the new default.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      adc18315
  13. 14 10月, 2012 1 次提交
    • R
      ARM: config: sort select statements alphanumerically · b1b3f49c
      Russell King 提交于
      As suggested by Andrew Morton:
      
        This is a pet peeve of mine.  Any time there's a long list of items
        (header file inclusions, kconfig entries, array initalisers, etc) and
        someone wants to add a new item, they *always* go and stick it at the
        end of the list.
      
        Guys, don't do this.  Either put the new item into a randomly-chosen
        position or, probably better, alphanumerically sort the list.
      
      lets sort all our select statements alphanumerically.  This commit was
      created by the following perl:
      
      while (<>) {
      	while (/\\\s*$/) {
      		$_ .= <>;
      	}
      	undef %selects if /^\s*config\s+/;
      	if (/^\s+select\s+(\w+).*/) {
      		if (defined($selects{$1})) {
      			if ($selects{$1} eq $_) {
      				print STDERR "Warning: removing duplicated $1 entry\n";
      			} else {
      				print STDERR "Error: $1 differently selected\n".
      					"\tOld: $selects{$1}\n".
      					"\tNew: $_\n";
      				exit 1;
      			}
      		}
      		$selects{$1} = $_;
      		next;
      	}
      	if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
      			  /^endif/ or /^endchoice/)) {
      		foreach $k (sort (keys %selects)) {
      			print "$selects{$k}";
      		}
      		undef %selects;
      	}
      	print;
      }
      if (%selects) {
      	foreach $k (sort (keys %selects)) {
      		print "$selects{$k}";
      	}
      }
      
      It found two duplicates:
      
      Warning: removing duplicated S5P_SETUP_MIPIPHY entry
      Warning: removing duplicated HARDIRQS_SW_RESEND entry
      
      and they are identical duplicates, hence the shrinkage in the diffstat
      of two lines.
      
      We have four testers reporting success of this change (Tony, Stephen,
      Linus and Sekhar.)
      Acked-by: NJason Cooper <jason@lakedaemon.net>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b1b3f49c
  14. 07 10月, 2012 2 次提交
  15. 17 9月, 2012 1 次提交
  16. 15 9月, 2012 3 次提交
    • S
      ARM: tegra: remove board (but not DT) support for Harmony · bb25af81
      Stephen Warren 提交于
      Harmony can be booted using device tree with equal functionality as when
      booted using a board file. Remove as much of the board file as is
      possible, since it's no longer needed.
      
      Two special-cases are still left in board-dt-tegra20.c, since the Tegra
      PCIe driver doesn't support device tree yet, and the Harmony .dts file
      doesn't yet describe regulators which are needed for PCIe. This logic is
      now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While
      this is more code than other boards, it's still unlikely to be much of a
      problem, and both regulators and PCIe should be supported via device tree
      in the near future, allowing the remaining code to be removed.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      bb25af81
    • S
      ARM: tegra: remove board (but not DT) support for Paz00 · cff1dfbf
      Stephen Warren 提交于
      Paz00 (Toshiba AC100) can be booted using device tree with equal
      functionality as when booted using a board file. Remove as much of the
      board file as is possible, since it's no longer needed.
      
      One special-case is still left in board-dt-tegra20.c, since there is no
      way to create a WiFi rfkill device from device tree yet. This logic is
      now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra
      cases where it's enabled (.configs which did not enable Paz00 support)
      shouldn't impact much since the amount of code is tiny.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-By: NMarc Dietrich <marvin24@gmx.de>
      cff1dfbf
    • S
      ARM: tegra: remove board (but not DT) support for TrimSlice · be6a9194
      Stephen Warren 提交于
      TrimSlice can be booted using device tree with equal functionality as
      when booted using a board file. Remove the board file since it's no
      longer needed.
      
      One special-case is still left in board-dt-tegra20.c, since the Tegra
      PCIe driver doesn't support device tree yet. This logic is now enabled
      by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra
      cases where it's enabled (.configs which did not enable TrimSlice
      support) shouldn't impact much since the amount of code is tiny.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      be6a9194
  17. 07 9月, 2012 1 次提交
  18. 21 6月, 2012 3 次提交
    • S
      ARM: tegra: remove Seaboard board files · 98a1405e
      Stephen Warren 提交于
      The Seaboard device tree supports all the features that the Seaboard
      board files support. Hence, there's no need to keep the board files
      around any more; all users should convert to device tree.
      
      MACH_KAEN and MACH_WARIO are also removed. While tegra-seaboard.dts
      doesn't support those explicitly, it would be trivial to create device
      trees for those boards if anyone cares.
      
      The Seaboard device tree is now compiled if Tegra2 support is enabled,
      rather than when Seaboard support is enabled.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      98a1405e
    • S
      ARM: tegra: remove CONFIG_MACH_TEGRA_DT · 2c95b7e0
      Stephen Warren 提交于
      * Make ARCH_TEGRA select USE_OF; DT is the way forward.
      * Build board-dt-tegra*.c when the relevant Tegra SoC support is enabled,
        rather than requiring a specific config option for this.
      * The board-specific config options already build board-*-pinmux.o, and
        when booting from device tree these files are no longer needed, so we
        can remove some Makefile commands related to those files.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      2c95b7e0
    • S
      ARM: tegra: make .dts compilation depend on Tegra2 support · 9132b0ed
      Stephen Warren 提交于
      Update Makefile.boot to compile *.dts when the appropriate Tegra SoC
      support is enabled, rather than requiring Kconfig to list each board
      individually. Remove CONFIG_MACH_VENTANA now that it has no use.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      9132b0ed
  19. 12 6月, 2012 1 次提交
  20. 12 5月, 2012 2 次提交
  21. 11 5月, 2012 2 次提交
  22. 09 5月, 2012 1 次提交
    • H
      ARM: tegra: Add Tegra AHB driver · 87d0bab2
      Hiroshi DOYU 提交于
      Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
      High-performance Bus (AHB) architecture.
      
      The AHB Arbiter controls AHB bus master arbitration. This effectively
      forms a second level of arbitration for access to the memory
      controller through the AHB Slave Memory device. The AHB pre-fetch
      logic can be configured to enhance performance for devices doing
      sequential access. Each AHB master is assigned to either the high or
      low priority bin. Both Tegra20/30 have this AHB bus.
      
      Some of configuration params could be passed from DT too if needed.
      Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Felipe Balbi <balbi@ti.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      87d0bab2
  23. 11 4月, 2012 1 次提交
    • S
      ARM: tegra: uncompress.h: Implement TEGRA_DEBUG_UART_AUTO_ODMDATA · 80881dae
      Stephen Warren 提交于
      Tegra has 5 UARTS which could be used for low-level debug output. Commit
      fe263989 "ARM: tegra: uncompress.h: Choose a UART at runtime" implemented
      one method for the kernel to automatically determine which of these to
      use at run-time, so that the same DEBUG_LL-enabled kernel image could be
      used across multiple Tegra boards. The required bootloader-side setup for
      that option is implemented in NVIDIA's various downstream U-Boot branches,
      but the U-Boot maintainers have refused to accept it upstream.
      
      This change implements an alternative automatic UART selection option
      using ODMDATA. This is a 32-bit value programmed into Tegra's boot memory
      which provides a few pieces of basic board-specific information, including
      a field that indicates the console UART. Setting up this value is part of
      the standard Tegra boot architecture, and so requires no Tegra-specific
      hacks in the bootloader's UART driver.
      
      Note that in theory, the format of ODMDATA is board-specific. However, in
      practice all boards use the same location/size/values for the UART field.
      ODMDATA[19:18] (which drive the type of debug console) is more problematic,
      since some boards use value 2 for UART and others use 3. This patch just
      accepts either value; if this doesn't work well for a given board, I'd
      suggest simply not enabling this debug option when building for that board.
      
      Note that the kernel assumes the bootloader has already set up any required
      pinmux settings for the UART; there is no way the kernel can do this for
      itself prior to knowing which board it's running on. In practice, people
      using this feature are highly likely to be using bootloaders that have
      indeed configured the pinmux. This assumption existed prior to this patch.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      80881dae
  24. 19 3月, 2012 1 次提交
  25. 06 3月, 2012 1 次提交
  26. 05 3月, 2012 1 次提交
  27. 27 2月, 2012 1 次提交
  28. 20 12月, 2011 1 次提交
  29. 18 12月, 2011 1 次提交