1. 26 9月, 2014 1 次提交
  2. 14 9月, 2014 1 次提交
  3. 31 8月, 2014 1 次提交
    • G
      spi/drivers: Restrict COMPILE_TEST by HAS_DMA where needed · f59838a0
      Geert Uytterhoeven 提交于
      commit dd1053a9 ("spi/drivers: Enable build of drivers with
      COMPILE_TEST") allows compile-testing drivers on platforms they're not
      meant for.
      
      However, adding "|| COMPILE_TEST" bypasses all other implicit dependencies
      assumed by the platform dependencies before, like HAS_DMA.
      
      If NO_DMA=y:
      
      drivers/built-in.o: In function `atmel_spi_dma_unmap_xfer':
      drivers/spi/spi-atmel.c:915: undefined reference to `dma_unmap_single'
      drivers/spi/spi-atmel.c:918: undefined reference to `dma_unmap_single'
      drivers/built-in.o: In function `atmel_spi_next_xfer_data':
      drivers/spi/spi-atmel.c:690: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `atmel_spi_dma_map_xfer':
      drivers/spi/spi-atmel.c:890: undefined reference to `dma_map_single'
      drivers/spi/spi-atmel.c:893: undefined reference to `dma_mapping_error'
      drivers/spi/spi-atmel.c:897: undefined reference to `dma_map_single'
      drivers/spi/spi-atmel.c:900: undefined reference to `dma_mapping_error'
      drivers/spi/spi-atmel.c:902: undefined reference to `dma_unmap_single'
      drivers/built-in.o: In function `atmel_spi_probe':
      drivers/spi/spi-atmel.c:1540: undefined reference to `dma_alloc_coherent'
      drivers/spi/spi-atmel.c:1623: undefined reference to `dma_free_coherent'
      drivers/built-in.o: In function `atmel_spi_remove':
      drivers/spi/spi-atmel.c:1665: undefined reference to `dma_free_coherent'
      drivers/built-in.o: In function `ep93xx_spi_dma_finish':
      drivers/spi/spi-ep93xx.c:550: undefined reference to `dma_unmap_sg'
      drivers/built-in.o: In function `ep93xx_spi_dma_prepare':
      drivers/spi/spi-ep93xx.c:516: undefined reference to `dma_map_sg'
      drivers/spi/spi-ep93xx.c:522: undefined reference to `dma_unmap_sg'
      drivers/built-in.o: In function `omap2_mcspi_rx_dma':
      drivers/spi/spi-omap2-mcspi.c:475: undefined reference to `dma_unmap_single'
      drivers/built-in.o: In function `omap2_mcspi_txrx_dma':
      drivers/spi/spi-omap2-mcspi.c:589: undefined reference to `dma_unmap_single'
      drivers/built-in.o: In function `omap2_mcspi_transfer_one_message':
      drivers/spi/spi-omap2-mcspi.c:1202: undefined reference to `dma_map_single'
      drivers/spi/spi-omap2-mcspi.c:1204: undefined reference to `dma_mapping_error'
      drivers/spi/spi-omap2-mcspi.c:1211: undefined reference to `dma_map_single'
      drivers/spi/spi-omap2-mcspi.c:1213: undefined reference to `dma_mapping_error'
      drivers/spi/spi-omap2-mcspi.c:1217: undefined reference to `dma_unmap_single'
      drivers/built-in.o: In function `tegra_spi_deinit_dma_param':
      drivers/spi/spi-tegra114.c:675: undefined reference to `dma_free_coherent'
      drivers/built-in.o: In function `tegra_spi_copy_spi_rxbuf_to_client_rxbuf':
      drivers/spi/spi-tegra114.c:415: undefined reference to `dma_sync_single_for_cpu'
      drivers/spi/spi-tegra114.c:440: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `tegra_spi_copy_client_txbuf_to_spi_txbuf':
      drivers/spi/spi-tegra114.c:381: undefined reference to `dma_sync_single_for_cpu'
      drivers/spi/spi-tegra114.c:405: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `tegra_spi_start_dma_based_transfer':
      drivers/spi/spi-tegra114.c:543: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `tegra_slink_deinit_dma_param':
      drivers/spi/spi-tegra20-slink.c:705: undefined reference to `dma_free_coherent'
      drivers/built-in.o: In function `tegra_slink_copy_spi_rxbuf_to_client_rxbuf':
      drivers/spi/spi-tegra20-slink.c:427: undefined reference to `dma_sync_single_for_cpu'
      drivers/spi/spi-tegra20-slink.c:452: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `tegra_slink_copy_client_txbuf_to_spi_txbuf':
      drivers/spi/spi-tegra20-slink.c:393: undefined reference to `dma_sync_single_for_cpu'
      drivers/spi/spi-tegra20-slink.c:417: undefined reference to `dma_sync_single_for_cpu'
      drivers/built-in.o: In function `tegra_slink_start_dma_based_transfer':
      drivers/spi/spi-tegra20-slink.c:561: undefined reference to `dma_sync_single_for_cpu'
      
      Add dependencies on HAS_DMA to fix this.
      Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      f59838a0
  4. 20 8月, 2014 1 次提交
    • R
      spi: bcm53xx: driver for SPI controller on Broadcom bcma SoC · 0fc6a323
      Rafał Miłecki 提交于
      Broadcom 53xx ARM SoCs use bcma bus that contains various cores (AKA
      devices). If board has a serial flash, it's connected over SPI and the
      bcma bus includes a SPI controller. Example log from such a board:
      bus0: Found chip with id 53010, rev 0x00 and package 0x02
      (...)
      bus0: Core 18 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0)
      
      This patch adds a bcma driver for SPI core, it registers SPI master
      controller and "bcm53xxspiflash" SPI device.
      Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      0fc6a323
  5. 17 8月, 2014 1 次提交
  6. 10 7月, 2014 2 次提交
  7. 05 7月, 2014 2 次提交
    • M
      spi/rockchip: Add dependencies on relaxed I/O accessors · c1536908
      Mark Brown 提交于
      Without the dependencies for the accessors the driver can be enabled on
      architectures where it will fail to build.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      c1536908
    • A
      spi/rockchip: add driver for Rockchip RK3xxx SoCs integrated SPI · 64e36824
      addy ke 提交于
      In order to facilitate understanding, rockchip SPI controller IP design
      looks similar in its registers to designware. But IC implementation
      is different from designware, So we need a dedicated driver for Rockchip
      RK3XXX SoCs integrated SPI. The main differences:
      
      - dma request line: rockchip SPI controller have two DMA request line
        for tx and rx.
      
      - Register offset:
                        RK3288        dw
        SPI_CTRLR0      0x0000        0x0000
        SPI_CTRLR1      0x0004        0x0004
        SPI_SSIENR      0x0008        0x0008
        SPI_MWCR        NONE          0x000c
        SPI_SER         0x000c        0x0010
        SPI_BAUDR       0x0010        0x0014
        SPI_TXFTLR      0x0014        0x0018
        SPI_RXFTLR      0x0018        0x001c
        SPI_TXFLR       0x001c        0x0020
        SPI_RXFLR       0x0020        0x0024
        SPI_SR          0x0024        0x0028
        SPI_IPR         0x0028        NONE
        SPI_IMR         0x002c        0x002c
        SPI_ISR         0x0030        0x0030
        SPI_RISR        0x0034        0x0034
        SPI_TXOICR      NONE          0x0038
        SPI_RXOICR      NONE          0x003c
        SPI_RXUICR      NONE          0x0040
        SPI_MSTICR      NONE          0x0044
        SPI_ICR         0x0038        0x0048
        SPI_DMACR       0x003c        0x004c
        SPI_DMATDLR     0x0040        0x0050
        SPI_DMARDLR     0x0044        0x0054
        SPI_TXDR        0x0400        NONE
        SPI_RXDR        0x0800        NONE
        SPI_IDR         NONE          0x0058
        SPI_VERSION     NONE          0x005c
        SPI_DR          NONE          0x0060
      
      - register configuration:
        such as SPI_CTRLRO in rockchip SPI controller:
          cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET)
              | (CR0_SSD_ONE << CR0_SSD_OFFSET);
          cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);
          cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);
          cr0 |= (rs->tmode << CR0_XFM_OFFSET);
          cr0 |= (rs->type << CR0_FRF_OFFSET);
        For more information, see RK3288 chip manual.
      
      - Wait for idle: Must ensure that the FIFO data has been sent out
        before the next transfer.
      Signed-off-by: Naddy ke <addy.ke@rock-chips.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      64e36824
  8. 17 5月, 2014 1 次提交
  9. 15 4月, 2014 3 次提交
  10. 08 4月, 2014 1 次提交
  11. 27 3月, 2014 1 次提交
  12. 22 3月, 2014 1 次提交
  13. 19 3月, 2014 1 次提交
  14. 13 3月, 2014 1 次提交
  15. 27 2月, 2014 1 次提交
    • G
      spi: sh-msiof: Use core message handling instead of spi-bitbang · 1bd6363b
      Geert Uytterhoeven 提交于
      The only remaining feature of spi-bitbang used by this driver is the
      chipselect() callback, which just does conditional GPIO.
      This is handled fine by the SPI core's spi_set_cs(), hence switch the
      driver to use the core message handling through our own transfer_one()
      method.
      
      As the (optional) GPIO CS is no longer deasserted at spi_master.setup()
      time (through spi_bitbang_setup() and the spi_bitbang.chipselect()
      callback), we now have to take care of that ourselves.
      
      Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI
      master is now registered using devm_spi_register_master()
      (spi_bitbang_start() uses the non-managed version).
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org>
      Acked-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      1bd6363b
  16. 24 2月, 2014 1 次提交
  17. 23 2月, 2014 3 次提交
  18. 19 2月, 2014 1 次提交
    • I
      spi: Add Qualcomm QUP SPI controller support · 64ff247a
      Ivan T. Ivanov 提交于
      Qualcomm Universal Peripheral (QUP) core is an AHB slave that
      provides a common data path (an output FIFO and an input FIFO)
      for serial peripheral interface (SPI) mini-core. SPI in master
      mode supports up to 50MHz, up to four chip selects, programmable
      data path from 4 bits to 32 bits and numerous protocol variants.
      
      Cc: Alok Chauhan <alokc@codeaurora.org>
      Cc: Gilad Avidov <gavidov@codeaurora.org>
      Cc: Kiran Gunda <kgunda@codeaurora.org>
      Cc: Sagar Dharia <sdharia@codeaurora.org>
      Cc: dsneddon@codeaurora.org
      Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      64ff247a
  19. 16 2月, 2014 1 次提交
  20. 10 2月, 2014 1 次提交
  21. 07 2月, 2014 1 次提交
  22. 05 2月, 2014 2 次提交
  23. 03 2月, 2014 1 次提交
  24. 13 1月, 2014 1 次提交
  25. 09 1月, 2014 1 次提交
  26. 12 12月, 2013 1 次提交
  27. 04 12月, 2013 1 次提交
  28. 28 11月, 2013 1 次提交
  29. 24 11月, 2013 3 次提交
  30. 26 9月, 2013 1 次提交
  31. 17 9月, 2013 1 次提交