This patch updates the existing rate tables with new frequencies.
Signed-off-by: NDeepak Sikri <deepak.sikri@st.com>
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch adds missing clocks: twd and macb.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NDeepak Sikri <deepak.sikri@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Flag CLK_SET_RATE_PARENT is required for a clock, where we want to
propagate clk_set_rate to its parent. This patch adds this to multiple clocks.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NVijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: NVijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch fixes parent names of multiple clocks.
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

dev_id & con_id names of multiple clocks are incorrect. This patch fixes these
names with the names that come via DT.
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NBhavna Yadav <bhavna.yadav@st.com>
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NDeepak Sikri <deepak.sikri@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The ARM IM-PD1 add-on module has a few clock of its own, let's
move also these down to the drivers/clk/versatile driver dir
and get rid of any remaining oldschool Integrator clocks.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

It turns out that all platforms using the ICST VCO are really
just touching two registers, and in the same way as well: one
register with the VCO configuration as such, and one lock register
that makes it possible to write to the VCO.

Factor this register read/write into the ICST driver so we can
reuse it in the IM-PD1 driver.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The GPLv2 headers were missing and the subsystem maintainer likes
them so put them in. I am the copyright holder, so explicitly
licensing these under the GPLv2.
Reported-by: NMike Turquette <mturquette@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Use a better name for the USB PHY clock.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This fixes compile error if one of SPEAr3xx implementations is not selected.

  CC      drivers/clk/spear/spear3xx_clock.o
drivers/clk/spear/spear3xx_clock.c: In function 'spear3xx_clk_init':
drivers/clk/spear/spear3xx_clock.c:599:3: error: implicit declaration of function 'spear300_clk_init' [-Werror=implicit-function-declaration]
drivers/clk/spear/spear3xx_clock.c:601:3: error: implicit declaration of function 'spear310_clk_init' [-Werror=implicit-function-declaration]
drivers/clk/spear/spear3xx_clock.c:603:3: error: implicit declaration of function 'spear320_clk_init' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[3]: *** [drivers/clk/spear/spear3xx_clock.o] Error 1
make[2]: *** [drivers/clk/spear] Error 2
make[1]: *** [drivers/clk] Error 2
make: *** [drivers] Error 2
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

In case of error, the function clk_register() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

At the same time the prcc bit for the kclk is corrected to
bit 8 instead of 3.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch adds some additional handling for the SDMMC special case
in round_rate and set_rate which results in invalid divisor messages
at boot time.
Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

In case of error, the function clk_register_fixed_rate() returns
ERR_PTR() and never returns NULL. The NULL test in the return value
check should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Using the armss clk to update the frequency makes the driver no more
directly dependant on the prmcu API.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The new armss clk is a prcmu_scalable_rate clk which represents
the ARMSS clk. This then makes it possible to convert the smp_twd
clk to a fixed factor clock type, using a fixed divider of 2 and
with the armss clk as parent.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The prcmu_scalable_rate clock can change rate but is not gateable.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

ARMSS clk directly maps it's frequency towards the cpufreq table.
To be able to update the ARMSS clk rate, a new set_rate function for
the ARMSS clk is added, which also will trigger a corresponding ARM
OPP request. Additionally an ARMSS clk round_rate function is added
to fetch valid cpufreq frequencies.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NSamuel Ortiz <sameo@linux.intel.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

By fetching the table as platform data we do not need the internally
hardcoded cpufreq table anymore.

Moreover the corresponding arm_opp idx2opp table, used for mapping
frequency to correct opp bits is also removed. This due to that the
opp bits is put directly in the index field of the cpufreq table.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NJonas Aaberg <jonas.aberg@stericsson.com>
Acked-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

To fetch the mfd child device we register the cpufreq driver
as a platform driver.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NJonas Aaberg <jonas.aberg@stericsson.com>
Acked-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The cpufreq table needs dynamically update due to what the PRCMU
firmware is supporting. The table is then provided through to the
mfd child device as platform data.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NJonas Aaberg <jonas.aberg@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NSamuel Ortiz <sameo@linux.intel.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The cpufreq device is already added from the prcmu driver as
a mfd child device.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NJonas Aaberg <jonas.aberg@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Move this driver to use devm_clk_register() to simplify some
error paths and reduce lines of code.
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Some clock drivers can be simplified if devres takes care of
unregistering any registered clocks along error paths. Introduce
devm_clk_register() so that clock drivers get unregistration for
free along with simplified error paths.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

clk_register() returns an ERR_PTR upon failure, not NULL. Fix
these error paths.
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch adds a DT and non-DT based implementation of
the common clock infrastructure for Versatile Express
platform. It registers (statically or using DT) all
required fixed clocks, initialises motherboard's SP810
cell (that provides clocks for SP804 timers) and
explicitly registers VE "osc" driver, to make the
clock generators available early.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This driver provides a common clock framework hardware driver
for Versatile Express clock generators (a.k.a "osc") controlled
via the config bus.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

On OMAP4+ platforms the functional clock for the McPDM IP is suplied by
the twl6040 codec (bit clock on the PDM bus).
This common clock driver for twl6040 will register the mcpdm_fclk clock to
be used by the McPDM driver to make sure that the needed clocks are
available when needed.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

In case of error, the function clk_register() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

In case of error, the function clk_register_fixed_rate() returns
ERR_PTR() not NULL pointer. The NULL test in the return value
check should be replaced with IS_ERR().

dpatch engine is used to auto generated this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

For u8500 and using 100MHz as the frequency also requires the ape opp 100
voltage, thus use the prcmu_opp_volt_scalable clock type.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Some scalable prcmu clocks needs to be handled in conjuction with the
ape opp 100 voltage. A new prcmu clock type clk_prcmu_opp_volt_scalable
is implemented to handle this.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This function needs to be exported to let clients be able to
request the ape opp 100 voltage.

Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>