1. 01 12月, 2015 1 次提交
  2. 14 10月, 2015 1 次提交
    • P
      PCI: of: Add 64-bit address recognition without LPAE support · 4af97106
      Pavel Fedin 提交于
      If non-LPAE kernel is booted up on a machine with 64-bit PCI resources,
      PCI controller probe fails with:
      
      PCI host bridge /pcie@10000000 ranges:
         IO 0x3eff0000..0x3effffff -> 0x00000000
        MEM 0x10000000..0x3efeffff -> 0x10000000
        MEM 0x8000000000..0xffffffffff -> 0x8000000000
      pci-host-generic 3f000000.pcie: resource collision: [mem 0x00000000-0xffffffff] conflicts with /pl011@9000000 [mem 0x09000000-0x09000fff]
      pci-host-generic: probe of 3f000000.pcie failed with error -16
      
      This happens because res->start assignment in of_pci_range_to_resource()
      truncates the upper part of the address, because res->start is of
      phys_addr_t type, which is 32-bit on non-LPAE kernels.
      
      This patch adds explicit recognition of 64-bit resources, preventing from
      potential problems when e. g. 0x8000001234 would be converted to
      0x00001234.
      Signed-off-by: NPavel Fedin <p.fedin@samsung.com>
      Signed-off-by: NRob Herring <robh@kernel.org>
      4af97106
  3. 26 8月, 2015 1 次提交
  4. 23 6月, 2015 1 次提交
  5. 16 5月, 2015 1 次提交
  6. 28 3月, 2015 2 次提交
  7. 19 11月, 2014 2 次提交
  8. 05 11月, 2014 1 次提交
  9. 01 10月, 2014 2 次提交
    • L
      of/pci: Fix the conversion of IO ranges into IO resources · 0b0b0893
      Liviu Dudau 提交于
      The ranges property for a host bridge controller in DT describes the
      mapping between the PCI bus address and the CPU physical address.  The
      resources framework however expects that the IO resources start at a pseudo
      "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT.  The
      conversion from PCI ranges to resources failed to take that into account,
      returning a CPU physical address instead of a port number.
      
      Also fix all the drivers that depend on the old behaviour by fetching the
      CPU physical address based on the port number where it is being needed.
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      CC: Grant Likely <grant.likely@linaro.org>
      CC: Rob Herring <robh+dt@kernel.org>
      CC: Arnd Bergmann <arnd@arndb.de>
      CC: Thierry Reding <thierry.reding@gmail.com>
      CC: Simon Horman <horms@verge.net.au>
      CC: Catalin Marinas <catalin.marinas@arm.com>
      0b0b0893
    • L
      of/pci: Move of_pci_range_to_resource() to of/address.c · 83bbde1c
      Liviu Dudau 提交于
      We need to enhance of_pci_range_to_resources() enough that it won't make
      sense for it to be inline anymore.  Move it to drivers/of/address.c, under
      #ifdef CONFIG_PCI.
      
      of_address.h previously implemented of_pci_range_to_resources()
      unconditionally, regardless of any config options.  The implementation in
      address.c is defined only when CONFIG_OF_ADDRESS=y and CONFIG_PCI=y,
      so add a dummy version to avoid build errors when CONFIG_OF or
      CONFIG_OF_ADDRESS is not defined.
      
      [bhelgaas: drop extra detail from changelog, move def under CONFIG_PCI,
      add dummy of_pci_range_to_resource() for build errors (from Arnd)]
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Grant Likely <grant.likely@linaro.org>
      CC: Rob Herring <robh+dt@kernel.org>
      CC: Arnd Bergmann <arnd@arndb.de>
      CC: Catalin Marinas <catalin.marinas@arm.com>
      83bbde1c
  10. 30 9月, 2014 1 次提交
    • L
      of/pci: Add pci_register_io_range() and pci_pio_to_address() · 41f8bba7
      Liviu Dudau 提交于
      Some architectures do not have a simple view of the PCI I/O space and
      instead use a range of CPU addresses that map to bus addresses.  For some
      architectures these ranges will be expressed by OF bindings in a device
      tree file.
      
      This patch introduces a pci_register_io_range() helper function with a
      generic implementation that can be used by such architectures to keep track
      of the I/O ranges described by the PCI bindings.  If the PCI_IOBASE macro
      is not defined, that signals lack of support for PCI and we return an
      error.
      
      In order to retrieve the CPU address associated with an I/O port, a new
      helper function pci_pio_to_address() is introduced.  This will search in
      the list of ranges registered with pci_register_io_range() and return the
      CPU address that corresponds to the given port.
      
      [arnd: add dummy !CONFIG_OF pci_pio_to_address() to fix build errors]
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: NRob Herring <robh@kernel.org>
      CC: Grant Likely <grant.likely@linaro.org>
      41f8bba7
  11. 23 7月, 2014 1 次提交
  12. 14 5月, 2014 1 次提交
  13. 06 5月, 2014 2 次提交
  14. 20 2月, 2014 1 次提交
  15. 05 2月, 2014 1 次提交
  16. 31 12月, 2013 1 次提交
    • R
      Revert "of/address: Handle #address-cells > 2 specially" · 13fcca8f
      Rob Herring 提交于
      This reverts commit e38c0a1f.
      
      Nikita Yushchenko reports:
      While trying to make freescale p2020ds and  mpc8572ds boards working
      with mainline kernel, I faced that commit e38c0a1f (Handle
      
      Both these boards have uli1575 chip.
      Corresponding part in device tree is something like
      
                      uli1575@0 {
                              reg = <0x0 0x0 0x0 0x0 0x0>;
                              #size-cells = <2>;
                              #address-cells = <3>;
                              ranges = <0x2000000 0x0 0x80000000
                                        0x2000000 0x0 0x80000000
                                        0x0 0x20000000
      
                                        0x1000000 0x0 0x0
                                        0x1000000 0x0 0x0
                                        0x0 0x10000>;
                              isa@1e {
      ...
      
      I.e. it has #address-cells = <3>
      
      With commit e38c0a1f reverted, devices under uli1575 are registered
      correctly, e.g. for rtc
      
      OF: ** translation for device /pcie@ffe09000/pcie@0/uli1575@0/isa@1e/rtc@70 **
      OF: bus is isa (na=2, ns=1) on /pcie@ffe09000/pcie@0/uli1575@0/isa@1e
      OF: translating address: 00000001 00000070
      OF: parent bus is default (na=3, ns=2) on /pcie@ffe09000/pcie@0/uli1575@0
      OF: walking ranges...
      OF: ISA map, cp=0, s=1000, da=70
      OF: parent translation for: 01000000 00000000 00000000
      OF: with offset: 70
      OF: one level translation: 00000000 00000000 00000070
      OF: parent bus is pci (na=3, ns=2) on /pcie@ffe09000/pcie@0
      OF: walking ranges...
      OF: default map, cp=a0000000, s=20000000, da=70
      OF: default map, cp=0, s=10000, da=70
      OF: parent translation for: 01000000 00000000 00000000
      OF: with offset: 70
      OF: one level translation: 01000000 00000000 00000070
      OF: parent bus is pci (na=3, ns=2) on /pcie@ffe09000
      OF: walking ranges...
      OF: PCI map, cp=0, s=10000, da=70
      OF: parent translation for: 01000000 00000000 00000000
      OF: with offset: 70
      OF: one level translation: 01000000 00000000 00000070
      OF: parent bus is default (na=2, ns=2) on /
      OF: walking ranges...
      OF: PCI map, cp=0, s=10000, da=70
      OF: parent translation for: 00000000 ffc10000
      OF: with offset: 70
      OF: one level translation: 00000000 ffc10070
      OF: reached root node
      
      With commit e38c0a1f in place, address translation fails:
      
      OF: ** translation for device /pcie@ffe09000/pcie@0/uli1575@0/isa@1e/rtc@70 **
      OF: bus is isa (na=2, ns=1) on /pcie@ffe09000/pcie@0/uli1575@0/isa@1e
      OF: translating address: 00000001 00000070
      OF: parent bus is default (na=3, ns=2) on /pcie@ffe09000/pcie@0/uli1575@0
      OF: walking ranges...
      OF: ISA map, cp=0, s=1000, da=70
      OF: parent translation for: 01000000 00000000 00000000
      OF: with offset: 70
      OF: one level translation: 00000000 00000000 00000070
      OF: parent bus is pci (na=3, ns=2) on /pcie@ffe09000/pcie@0
      OF: walking ranges...
      OF: default map, cp=a0000000, s=20000000, da=70
      OF: default map, cp=0, s=10000, da=70
      OF: not found !
      
      Thierry Reding confirmed this commit was not needed after all:
      "We ended up merging a different address representation for Tegra PCIe
      and I've confirmed that reverting this commit doesn't cause any obvious
      regressions. I think all other drivers in drivers/pci/host ended up
      copying what we did on Tegra, so I wouldn't expect any other breakage
      either."
      
      There doesn't appear to be a simple way to support both behaviours, so
      reverting this as nothing should be depending on the new behaviour.
      
      Cc: stable@vger.kernel.org # v3.7+
      Signed-off-by: NRob Herring <robh@kernel.org>
      13fcca8f
  17. 24 10月, 2013 1 次提交
    • G
      of/irq: Rename of_irq_map_* functions to of_irq_parse_* · 0c02c800
      Grant Likely 提交于
      The OF irq handling code has been overloading the term 'map' to refer to
      both parsing the data in the device tree and mapping it to the internal
      linux irq system. This is probably because the device tree does have the
      concept of an 'interrupt-map' function for translating interrupt
      references from one node to another, but 'map' is still confusing when
      the primary purpose of some of the functions are to parse the DT data.
      
      This patch renames all the of_irq_map_* functions to of_irq_parse_*
      which makes it clear that there is a difference between the parsing
      phase and the mapping phase. Kernel code can make use of just the
      parsing or just the mapping support as needed by the subsystem.
      
      The patch was generated mechanically with a handful of sed commands.
      Signed-off-by: NGrant Likely <grant.likely@linaro.org>
      Acked-by: NMichal Simek <monstr@monstr.eu>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      0c02c800
  18. 16 10月, 2013 1 次提交
  19. 10 10月, 2013 1 次提交
    • R
      of: implement pci_address_to_pio as weak function · 25ff7944
      Rob Herring 提交于
      Implement pci_address_to_pio as weak function to remove the dependency on
      asm/prom.h. This is in preparation to make prom.h optional.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Acked-by: NGrant Likely <grant.likely@linaro.org>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: x86@kernel.org
      Cc: Grant Likely <grant.likely@linaro.org>
      25ff7944
  20. 04 7月, 2013 1 次提交
  21. 20 5月, 2013 1 次提交
  22. 09 1月, 2013 1 次提交
  23. 18 10月, 2012 1 次提交
    • K
      of/address: sparse fixes · 47b1e689
      Kim Phillips 提交于
      drivers/of/address.c:66:29: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:66:29:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:66:29:    got unsigned int [usertype] *addr
      drivers/of/address.c:87:32: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:87:32:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:87:32:    got unsigned int [usertype] *addr
      drivers/of/address.c:91:30: warning: incorrect type in assignment (different base types)
      drivers/of/address.c:91:30:    expected unsigned int [unsigned] [usertype] <noident>
      drivers/of/address.c:91:30:    got restricted __be32 [usertype] <noident>
      drivers/of/address.c:92:22: warning: incorrect type in assignment (different base types)
      drivers/of/address.c:92:22:    expected unsigned int [unsigned] [usertype] <noident>
      drivers/of/address.c:92:22:    got restricted __be32 [usertype] <noident>
      drivers/of/address.c:147:35: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:147:35:    expected restricted __be32 const [usertype] *addr
      drivers/of/address.c:147:35:    got unsigned int [usertype] *addr
      drivers/of/address.c:157:34: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:157:34:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:157:34:    got unsigned int [usertype] *
      drivers/of/address.c:256:29: warning: restricted __be32 degrades to integer
      drivers/of/address.c:256:36: warning: restricted __be32 degrades to integer
      drivers/of/address.c:262:34: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:262:34:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:262:34:    got unsigned int [usertype] *
      drivers/of/address.c:372:41: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:372:41:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:372:41:    got unsigned int [usertype] *addr
      drivers/of/address.c:395:53: warning: incorrect type in argument 2 (different base types)
      drivers/of/address.c:395:53:    expected restricted __be32 const [usertype] *addr
      drivers/of/address.c:395:53:    got unsigned int [usertype] *addr
      drivers/of/address.c:443:50: warning: incorrect type in argument 2 (different base types)
      drivers/of/address.c:443:50:    expected restricted __be32 const [usertype] *addr
      drivers/of/address.c:443:50:    got unsigned int *<noident>
      drivers/of/address.c:455:49: warning: incorrect type in argument 1 (different base types)
      drivers/of/address.c:455:49:    expected restricted __be32 const [usertype] *cell
      drivers/of/address.c:455:49:    got unsigned int *<noident>
      drivers/of/address.c:480:60: warning: incorrect type in argument 2 (different base types)
      drivers/of/address.c:480:60:    expected restricted __be32 const [usertype] *addr
      drivers/of/address.c:480:60:    got unsigned int *<noident>
      drivers/of/address.c:412:5: warning: symbol '__of_translate_address' was not declared. Should it be static?
      drivers/of/address.c:520:14: error: symbol 'of_get_address' redeclared with different type (originally declared at include/linux/of_address.h:22) - different base types
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      47b1e689
  24. 08 9月, 2012 1 次提交
  25. 03 8月, 2012 1 次提交
    • S
      of: Allow busses with #size-cells=0 · 5d61b165
      Stephen Warren 提交于
      It's quite legitimate for a DT node to specify #size-cells=0. One example
      is a node that's used to collect a number of non-memory-mapped devices.
      In that scenario, there may be multiple child nodes with the same name
      (type) thus necessitating the use of unit addresses in node names, and
      reg properties:
      
      / {
      	regulators {
      		compatible = "simple-bus";
      		#address-cells = <1>;
      		#size-cells = <0>;
      
      		regulator@0 {
      			compatible = "regulator-fixed";
      			reg = <0>;
      			...
      		};
      
      		regulator@1 {
      			compatible = "regulator-fixed";
      			reg = <1>;
      			...
      		};
      
      		...
      	};
      };
      
      However, #size-cells=0 prevents translation of reg property values into
      the parent node's address space. In turn, this triggers the kernel to
      emit error messages during boot, such as:
      
          prom_parse: Bad cell count for /regulators/regulator@0
      
      To prevent printing these error messages for legitimate DT content, a
      number of changes are made:
      
      1) of_get_address()/of_get_pci_address() are modified only to validate
         the value of #address-cells, and not #size-cells.
      
      2) of_can_translate_address() is added to indicate whether address
         translation is possible.
      
      3) of_device_make_bus_id() is modified to name devices based on the
         translated address only where possible, and otherwise fall back to
         using the (first cell of the) raw untranslated address.
      
      4) of_device_alloc() is modified to create memory resources for a device
         only if the address can be translated into the CPU's address space.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      5d61b165
  26. 23 4月, 2012 1 次提交
    • A
      ARM: spear: remove most mach/*.h header contents · 5019f0b1
      Arnd Bergmann 提交于
      The register and irq definitions in mach/*.h for spear3xx and
      spear6xx are now mostly obsolete, after the platforms have been
      converted to device tree based probing and the data is now
      part of the device tree files.
      
      The misc_regs.h contents are moved into clock.c because that is
      the only user, aside from the DMA_CHN_CFG that should eventually
      get handled differently. Some of the contents of mach/spear.h
      still remain, because they are used to set up the static map table,
      timer, uart and auxdata tables, but almost everything got removed.
      We might remove everything but the map table as the DT conversion
      completes, but that is not a priority. I've also made sure to
      make both copies of spear.h more or less identical so we can
      eventually combine them.
      
      The spear3?0.h files were only used by the spear3?0.c files, so I
      merged the contents in there and removed the bits that were unused.
      This is something that should still be looked at.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NViresh Kumar <viresh.kumar@st.com>
      5019f0b1
  27. 04 1月, 2012 1 次提交
  28. 01 8月, 2011 1 次提交
  29. 19 7月, 2011 1 次提交
  30. 24 12月, 2010 1 次提交
  31. 09 12月, 2010 1 次提交
  32. 13 10月, 2010 1 次提交
  33. 06 7月, 2010 4 次提交