1. 30 3月, 2011 1 次提交
  2. 10 3月, 2011 1 次提交
  3. 31 12月, 2008 1 次提交
    • A
      powerpc/qe: Fix few build errors with CONFIG_QUICC_ENGINE=n · be11d3b3
      Anton Vorontsov 提交于
      Some 83xx boards were not ready for the optional QUICC Engine support.
      
      This patch fixes following build errors:
      
      arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
      (.text+0xb308): undefined reference to `par_io_data_set'
      arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
      (.text+0xb334): undefined reference to `par_io_data_set'
      arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
      (.text+0xb408): undefined reference to `qe_ic_get_high_irq'
      arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
      (.text+0xb478): undefined reference to `qe_ic_get_low_irq'
      arch/powerpc/platforms/built-in.o: In function `mpc832x_spi_init':
      mpc832x_rdb.c:(.init.text+0x574c): undefined reference to `par_io_config_pin'
      mpc832x_rdb.c:(.init.text+0x5768): undefined reference to `par_io_config_pin'
      mpc832x_rdb.c:(.init.text+0x5784): undefined reference to `par_io_config_pin'
      mpc832x_rdb.c:(.init.text+0x57a0): undefined reference to `par_io_config_pin'
      mpc832x_rdb.c:(.init.text+0x57bc): undefined reference to `par_io_config_pin'
      arch/powerpc/platforms/built-in.o:mpc832x_rdb.c:(.init.text+0x57d8): more undefined references to `par_io_config_pin' follow
      arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_init_IRQ':
      mpc836x_rdk.c:(.init.text+0x5e84): undefined reference to `qe_ic_init'
      arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_setup_arch':
      mpc836x_rdk.c:(.init.text+0x5f10): undefined reference to `qe_reset'
      make: *** [.tmp_vmlinux1] Error 1
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      be11d3b3
  4. 04 8月, 2008 1 次提交
  5. 08 10月, 2007 1 次提交
    • A
      [POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading · cccd2102
      Anton Vorontsov 提交于
      set_irq_chained_handler overwrites MPIC's handle_irq function
      (handle_fasteoi_irq) thus MPIC never gets eoi event from the
      cascaded IRQ. This situation hangs MPIC on MPC8568E.
      
      To solve this problem efficiently, QEIC needs pluggable handlers,
      specific to the underlaying interrupt controller.
      
      Patch extends qe_ic_init() function to accept low and high interrupt
      handlers. To avoid #ifdefs, stack of interrupt handlers specified in
      the header file and functions are marked 'static inline', thus
      handlers are compiled-in only if actually used (in the board file).
      Another option would be to lookup for parent controller and
      automatically detect handlers (will waste text size because of
      never used handlers, so this option abolished).
      
      qe_ic_init() also changed in regard to support multiplexed high/low
      lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic()
      handler implemented appropriately.
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      cccd2102
  6. 04 10月, 2006 1 次提交
    • L
      [POWERPC] Add QUICC Engine (QE) infrastructure · 98658538
      Li Yang 提交于
      Add QUICC Engine (QE) configuration, header files, and
      QE management and library code that are used by QE devices
      drivers.
      
      Includes Leo's modifications up to, and including, the
      platform_device to of_device adaptation:
      
      "The series of patches add generic QE infrastructure called
      qe_lib, and MPC8360EMDS board support.  Qe_lib is used by
      QE device drivers such as ucc_geth driver.
      
      This version updates QE interrupt controller to use new irq
      mapping mechanism, addresses all the comments received with
      last submission and includes some style fixes.
      
      v2: Change to use device tree for BCSR and MURAM;
      Remove I/O port interrupt handling code as it is not generic
      enough.
      
      v3: Address comments from Kumar;  Update definition of several
      device tree nodes;  Copyright style change."
      
      In addition, the following changes have been made:
      
      o removed typedefs
      o uint -> u32 conversions
      o removed following defines:
        QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
        BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
        because they hid sizeof/in_be32/out_be32 operations from the reader.
      o fixed qe_snums_init() serial num assignment to use a const array
      o made CONFIG_UCC_FAST select UCC_SLOW
      o reduced NR_QE_IC_INTS from 128 to 64
      o remove _IO_BASE, etc. defines (not used)
      o removed irrelevant comments, added others to resemble removed BD_ defines
      o realigned struct definitions in headers
      o various other style fixes including things like pinMask -> pin_mask
      o fixed a ton of whitespace issues
      o marked ioregs as __be32/__be16
      o removed platform_device code and redundant get_qe_base()
      o removed redundant comments
      o added cpu_relax() to qe_reset
      o uncasted all get_property() assignments
      o eliminated unneeded casts
      o eliminated immrbar_phys_to_virt (not used)
      Signed-off-by: NLi Yang <leoli@freescale.com>
      Signed-off-by: NShlomi Gridish <gridish@freescale.com>
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      98658538