- 16 2月, 2018 3 次提交
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由 Jernej Skrabec 提交于
dw_hdmi shouldn't set drvdata since some drivers might need to store it's own data there. Rework dw_hdmi in a way to return struct dw_hdmi instead to store it in drvdata. This way drivers are responsible to store and pass structure when needed. Idea was taken from the following commit: 8242ecbd ("drm/bridge/synopsys: stop clobbering drvdata") Cc: p.zabel@pengutronix.de Cc: Laurent.pinchart@ideasonboard.com Cc: hjc@rock-chips.com Acked-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NArchit Taneja <architt@codeaurora.org> Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180214200906.31509-6-jernej.skrabec@siol.net
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由 Jernej Skrabec 提交于
Parts of PHY code could be useful also for custom PHYs. For example, Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY with few additional memory mapped registers, so most of the Synopsys PHY related code could be reused. Functions exported here are actually not specific to Synopsys PHYs but to DWC HDMI controller PHY interface. This means that even if the PHY is completely custom, i.e. not designed by Synopsys, exported functions can be useful. Reviewed-by: NArchit Taneja <architt@codeaurora.org> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180214200906.31509-5-jernej.skrabec@siol.net
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由 Jernej Skrabec 提交于
Allwinner SoCs have dw hdmi controller v1.32a which exhibits same magenta line issue as i.MX6Q and i.MX6DL. Enable workaround for it. Tests show that one iteration is enough. Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: NArchit Taneja <architt@codeaurora.org> Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180214200906.31509-4-jernej.skrabec@siol.net
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- 14 2月, 2018 3 次提交
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由 Chunming Zhou 提交于
swiotlb expands our card accessing range, but its path always is slower than ttm pool allocation. So add condition to use it. v2: move a bit later Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-3-david1.zhou@amd.com
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由 Chunming Zhou 提交于
get the max io mapping address of system memory to see if it is over our card accessing range. v2: move checking later Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-2-david1.zhou@amd.com
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由 Chunming Zhou 提交于
it will be used to check if the driver needs swiotlb v2: Don't use inline, instead, move function to drm_memory.c (Michel Daenzer <michel@daenzer.net>) Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-1-david1.zhou@amd.com
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- 11 2月, 2018 2 次提交
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由 Boris Brezillon 提交于
The V3D engine has various hardware counters which might be interesting to userspace performance analysis tools. Expose new ioctls to create/destroy a performance monitor object and query the counter values of this perfmance monitor. Note that a perfomance monitor is given an ID that is only valid on the file descriptor it has been allocated from. A performance monitor can be attached to a CL submission and the driver will enable HW counters for this request and update the performance monitor values at the end of the job. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180112090926.12538-1-boris.brezillon@free-electrons.com
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由 Eric Anholt 提交于
When we debug print what ioctl we're calling into, we include the pid. If you have multiple processes rendering simulataneously, the error return also needs the pid so you can see which of the ioctl calls was the one to fail. Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180130215643.11016-1-eric@anholt.netReviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 08 2月, 2018 4 次提交
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由 Philippe CORNU 提交于
Hw older versions support non-alpha color formats derived from native alpha color formats only on the primary layer. For instance, RG16 native format without alpha works fine on 2nd layer but XR24 (derived color format from AR24) does not work on 2nd layer. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NYannick Fertré <yannick.fertre@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180201104243.20726-3-philippe.cornu@st.com
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由 Philippe CORNU 提交于
ltdc supports natively some color formats with alpha (like ARGB8888, ARGB1555, ARGB4444...). Related non-alpha formats are supported too (ARGB8888->XRGB8888, ARGB4444->XRGB4444...) by adjusting ltdc blending factors. Note: Wayland/Weston requests by default the non-alpha XRGB8888 color format. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NYannick Fertré <yannick.fertre@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180201104243.20726-2-philippe.cornu@st.com
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由 Philippe Cornu 提交于
Add support for the Synopsys DesignWare MIPI DSI version 1.31 Two registers need to be updated/added for supporting 1.31: * PHY_TMR_CFG 0x9c (updated) 1.30 [31:24] phy_hs2lp_time [23:16] phy_lp2hs_time [14: 0] max_rd_time 1.31 [25:16] phy_hs2lp_time [ 9: 0] phy_lp2hs_time * PHY_TMR_RD_CFG 0xf4 (new) 1.31 [14: 0] max_rd_time Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180206084251.303-1-philippe.cornu@st.com
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由 Philippe Cornu 提交于
This patch adds the DCS/GENERIC DSI read feature. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com> Reviewed-by: NBrian Norris <briannorris@chromium.org> Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180204213104.17834-1-philippe.cornu@st.com
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- 07 2月, 2018 6 次提交
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由 Linus Walleij 提交于
The Versatile PL110 implementations use multiple endpoints: from the PL111 port, the lines are routed through a PLD, and from there forked so the same lines go to a VGA DAC and an external TFT panel connector. This is discrete wireing so there is no way to turn of one output, i.e. this is really two endpoints, not two ports. We model this with multiple endpoints, so we need to loop over the available endpoints, check for panel or bridge on each and accumulate the result before continuing. The code already will give the panel preference over the bridge, if present, so the output will be sent to the panel if both a panel and a bridge is present on two endpoints of the same port. If they all return -EPROBE_DEFER we return -EPROBE_DEFER as well. If just one endpoint is present on the port, the behaviour is the same as before. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-5-linus.walleij@linaro.org
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由 Linus Walleij 提交于
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their vertical and next base interrupts are not functional. Support these variants by simply disabling the use of the vblank interrupt on these variants. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-4-linus.walleij@linaro.org
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由 Linus Walleij 提交于
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their clock dividers do not work properly. Support disabling the clock divider and drive the clock directly from the parent under these circumstances. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-3-linus.walleij@linaro.org
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由 Linus Walleij 提交于
The ARM Versatile series can do RGB/BGR565 with an external "PLD" (Programmable Logical Device). However the CLCD does not have control bits for this, so it needs to be set into the ordinary 16BPP mode, then the RGB/BGR565 handling of the pixel data is handled by configuring the PLD through the external register. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-2-linus.walleij@linaro.org
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由 Linus Walleij 提交于
With a bit of refactoring we can contain the variant data for the strange PL110 versions that is feature-incomplete PL110 for the ARM Integrator/CP and somewhere inbetween PL110 and PL111 for the ARM Versatile AB and Versatile PB. We also accomodate for the custom duct-taped RGB565/BGR565 support in the Versatile variant. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-1-linus.walleij@linaro.org
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由 Linus Walleij 提交于
The ARM reference designs "Versatile AB" and "Versatile PB" contain panel connectors with autodetection of the connected panel type. This adds a small driver utilizing the MFD syscon look-up to read the autodetection register and set up the corresponding panel appropriately. In the source file there is a bit of elaboration of the panel types and interfaces on these boards. This was tested with the PL111 DRM driver on the ARM Versatile AB with the IB2 daughterboard. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180205192013.5349-2-linus.walleij@linaro.org
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- 05 2月, 2018 1 次提交
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由 Maarten Lankhorst 提交于
This will make it possible for userspace to know whether reading will block, without blocking on the fd. This makes it possible to drain all queued CRC's in blocking mode, without having to reopen the fd. Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180202142743.68527-1-maarten.lankhorst@linux.intel.comReviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> [mlankhorst: Use POLLIN|POLLRDNORM, based on Ville's suggestion]
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- 02 2月, 2018 3 次提交
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由 Ville Syrjälä 提交于
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane crtc coordinates the user also provided. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180123170857.13818-2-ville.syrjala@linux.intel.com Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com> #irc
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由 Ville Syrjälä 提交于
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180123170857.13818-1-ville.syrjala@linux.intel.comReviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
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由 Tomeu Vizoso 提交于
If the wait timeouts, the caps are probably invalid and we shouldn't be passing them to userspace. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Link: http://patchwork.freedesktop.org/patch/msgid/20171127142126.25765-1-tomeu.vizoso@collabora.comSigned-off-by: NGerd Hoffmann <kraxel@redhat.com>
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- 31 1月, 2018 3 次提交
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由 Gustavo A. R. Silva 提交于
Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180130100528.GA7154@training
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由 Dan Carpenter 提交于
The parentheses are in the wrong place here so we pass the bits per pixel as zero. Fixes: abbee623 ("drm/mgag200: Added resolution and bandwidth limits for various G200e products.") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180125142655.GA23885@mwanda
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由 Daniel Vetter 提交于
drm_encoder_slave is the old way to write bridge drivers, for i2c bridges only. It's deprecated, and definitely should not be used in new drivers. This has absolutely nothing to do with the new bridge driver infrastructure implemented by drm_bridge. What's even strange is that arcpgu doesn't even use any of this, it really only wants a plain normal drm_encoder. Nuke all the surplus real estate. v2: Actually git add after compile testing ... v3: Clarify commit message and stop including drm_encoder_slave.h. Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180117141755.16933-1-daniel.vetter@ffwll.ch
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- 30 1月, 2018 12 次提交
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由 Maarten Lankhorst 提交于
Userspace can set a FB_ID on a plane without setting CRTC_ID, which will fail with -EINVAL, but the kernel shouldn't warn about that. Same for !FB_ID and CRTC_ID being set. Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180130102704.28016-1-maarten.lankhorst@linux.intel.comReviewed-by: NHarry Wentland <harry.wentland@amd.com>
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由 Philippe Cornu 提交于
The dw_mipi_dsi_host_transfer() must return the number of bytes transmitted/received on success instead of 0. Note: As the read feature is not implemented, only the transmitted number of bytes is returned for the moment. Reviewed-by: NBrian Norris <briannorris@chromium.org> Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180125103800.1999-3-philippe.cornu@st.com
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由 Philippe Cornu 提交于
The dcs/generic dsi read feature is not yet implemented so it is important to warn the host_transfer() caller in case of read operation requests. Reviewed-by: NBrian Norris <briannorris@chromium.org> Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Signed-off-by: NArchit Taneja <architt@codeaurora.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180125103800.1999-2-philippe.cornu@st.com
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由 Philippe Cornu 提交于
To optimize data transfers, align pitch on 128 bytes & height on 4 bytes. This optimization is not applicable on hw without MMU. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Signed-off-by: NVincent Abriou <vincent.abriou@st.com> Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180130104200.21602-1-philippe.cornu@st.com
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由 Philippe CORNU 提交于
Add support for the stm dsi phy/wrapper version 1.31. Only lane capabilities need to be modified. Signed-off-by: NPhilippe Cornu <philippe.cornu@st.com> Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180122164628.24728-1-philippe.cornu@st.com
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由 Leo (Sunpeng) Li 提交于
During a non-blocking commit, it is possible to return before the commit_tail work is queued (-ERESTARTSYS, for example). Since a reference on the crtc commit object is obtained for the pending vblank event when preparing the commit, the above situation will leave us with an extra reference. Therefore, if the commit_tail worker has not consumed the event at the end of a commit, release it's reference. Changes since v1: - Also check for state->event->base.completion being set, to handle the case where stall_checks() fails in setup_crtc_commit(). Changes since v2: - Add a flag to drm_crtc_commit, to prevent dereferencing a freed event. i915 may unreference the state in a worker. Fixes: 24835e44 ("drm: reference count event->completion") Cc: <stable@vger.kernel.org> # v4.11+ Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> #v1 Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180117115108.29608-1-maarten.lankhorst@linux.intel.comReviewed-by: NSean Paul <seanpaul@chromium.org>
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由 Ville Syrjälä 提交于
We never support certain mode flags etc. Reject those early on in the mode_config.mode_valid() hook. That allows us to remove some duplicated checks from the connector .mode_valid() hooks, and it guarantees that we never see those flags even from user mode as the mode_config.mode_valid() hooks gets executed for those as well. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171114183258.16976-11-ville.syrjala@linux.intel.comReviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
Allow drivers to provide a device wide .mode_valid() hook in addition to the already existing crtc/encoder/bridge/connector hooks. This can be used to validate device/driver wide constraings without having to add those to the other hooks. And since we call this hook also for user modes later on in the modeset we don't have to worry about anything the hook has already rejected. I also have some further ideas for this hook. Eg. we could replace the drm_mode_set_crtcinfo(HALVE_V) call in drm_mode_convert_umode()/etc. with a driver specific variant via this hook. At least on i915 we would like to pass CRTC_STEREO_DOUBLE to that function instead, and then we could safely use the crtc_ timings in all our .mode_valid() hooks, which would allow us to reuse those hooks for validating the adjusted_mode during a modeset. v2: Fix the language fails in the kernel docs (Daniel) Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171114183258.16976-10-ville.syrjala@linux.intel.comReviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
For some reason drm_mode_set_crtcinfo() does nothing if the mode has the DRM_MODE_TYPE_BUILTIN flag set without the other bit from DRM_MODE_TYPE_CRTC_C also set. I have zero idea what that is supposed to achieve, but since we have no users for neither flag bit let's kill this nonsense off. v2: Fix typo in commit message Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171114183258.16976-7-ville.syrjala@linux.intel.comReviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ville Syrjälä 提交于
Currently userspace is allowed to feed in any king of garbage in the high bits of the mode flags/type, as are drivers when probing modes. Reject any mode with bogus flags/type. Hopefully this won't break any current userspace... v2: Split the type and flags checks to separates ifs (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jose Abreu <Jose.Abreu@synopsys.com> Cc: Adam Jackson <ajax@redhat.com> Cc: Keith Packard <keithp@keithp.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NAdam Jackson <ajax@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171115154913.23827-1-ville.syrjala@linux.intel.comReviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ville Syrjälä 提交于
Currently we don't sanity check the 3D stereo flags for modes filled out by the kernel. Move the check from drm_mode_convert_umode() into drm_mode_validate_basic() so that we get the same check going both ways. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171114183258.16976-2-ville.syrjala@linux.intel.comReviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ville Syrjälä 提交于
We use 32bit bitmasks to track planes/crtcs/encoders/connectors. Naturally we can only do that if the index of those objects stays below 32. Issue a warning whenever we exceed that limit, hopefully prompting someone to fix the problem. For connectors the issue is a bit more complicated as they can be created/destroyed at runtime due to MST. So the problem is no longer a purely theoretical programmer error. As the connector indexes are allocated via ida, we can simply limit the maximum value the ida is allowed to hand out. The error handling is already in place. v2: Return an error to the caller (Harry) v3: Print a debug message so that we know what happened (Maarten) Cc: Harry Wentland <harry.wentland@amd.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180125133020.23845-1-ville.syrjala@linux.intel.comReviewed-by: NHarry Wentland <harry.wentland@amd.com>
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- 29 1月, 2018 3 次提交
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由 Maxime Ripard 提交于
Due to the way the composition is done in hardware, we can only have a single alpha-enabled plane active at a time, placed in the second (highest priority) pipe. Make sure of that in our atomic_check to not end up in an impossible scenario. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/7371f62a1385f2cbe3ed75dfca2e746338eb2286.1516617243.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
Our various planes have a configurable zpos, that combined with the pipes allow to configure the composition. Since the interaction between the pipes, zpos and alphas framebuffers is not trivial, let's just enable the zpos as an immutable property for now, and use that zpos in our atomic_update part. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/b006853e908bd06661c5bc1f2191121523bce0e4.1516617243.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
The plane state zpos value will be set only if there's an existing state attached to the plane when creating the property. However, this is not the case during the probe, and we therefore need to put our default value in our reset hook. Acked-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/b6a183234f0ad5a9a58c780c9cabbe29cbf40888.1516617243.git-series.maxime.ripard@free-electrons.com
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