1. 11 8月, 2010 1 次提交
  2. 02 8月, 2010 1 次提交
    • A
      powerpc/5200/i2c: improve i2c bus error recovery · 0c2daaaf
      Albrecht Dreß 提交于
      This patch improves the recovery of the MPC's I2C bus from errors like bus
      hangs resulting in timeouts:
      1. make the bus timeout configurable, as it depends on the bus clock and
          the attached slave chip(s); default is still 1 second;
      2. detect any of the cases indicated by the CF, BB and RXAK MSR flags if a
          timeout occurs, and add a missing (required) MAL reset;
      3. use a more reliable method to fixup the bus if a hang has been detected.
          The sequence is sent 9 times which seems to be necessary if a slave
          "misses" more than one clock cycle.  For 400 kHz bus speed, the fixup is
          also ~70us (81us vs. 150us) faster.
      
      Tested on a custom Lite5200b derived board, with a Dallas RTC, AD sensors
      and NXP IO expander chips attached to the i2c.
      
      Changes vs. v1:
      - use improved bus fixup sequence for all chips (not only the 5200)
      - calculate real clock from defaults if no clock is given in the device tree
      - better description (I hope) of the changes.
      
      I didn't split the changes in this file into three parts as recommended by
      Grant, as they actually belong together (i.e. they address one single
      problem, just in three places of one single source file).
      Signed-off-by: NAlbrecht Dreß <albrecht.dress@arcor.de>
      [grant.likely@secretlab.ca: fixup for ->node to ->dev.of_node transition]
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      0c2daaaf
  3. 10 7月, 2010 2 次提交
  4. 09 7月, 2010 1 次提交
  5. 06 7月, 2010 2 次提交
  6. 03 6月, 2010 6 次提交
  7. 22 5月, 2010 14 次提交
  8. 20 5月, 2010 13 次提交