1. 08 10月, 2010 1 次提交
  2. 02 10月, 2010 1 次提交
    • N
      ARM: add a vma entry for the user accessible vector page · ec706dab
      Nicolas Pitre 提交于
      The kernel makes the high vector page visible to user space. This page
      contains (amongst others) small code segments that can be executed in
      user space.  Make this page visible through ptrace and /proc/<pid>/mem
      in order to let gdb perform code parsing needed for proper unwinding.
      
      For example, the ERESTART_RESTARTBLOCK handler actually has a stack
      frame -- it returns to a PC value stored on the user's stack.   To
      unwind after a "sleep" system call was interrupted twice, GDB would
      have to recognize this situation and understand that stack frame
      layout -- which it currently cannot do.
      
      We could fix this by hard-coding addresses in the vector page range into
      GDB, but that isn't really portable as not all of those addresses are
      guaranteed to remain stable across kernel releases.  And having the gdb
      process make an exception for this page and get  content from its own
      address space for it looks strange, and it is not future proof either.
      
      Being located above PAGE_OFFSET, this vma cannot be deleted by
      user space code.
      Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
      ec706dab
  3. 08 9月, 2010 1 次提交
  4. 27 7月, 2010 2 次提交
    • R
      ARM: call machine_shutdown() from machine_halt(), etc · 3d3f78d7
      Russell King 提交于
      x86 calls machine_shutdown() from the various machine_*() calls which
      take the machine down ready for halting, restarting, etc, and uses
      this to bring the system safely to a point where those actions can be
      performed.  Such actions are stopping the secondary CPUs.
      
      So, change the ARM implementation of these to reflect what x86 does.
      
      This solves kexec problems on ARM SMP platforms, where the secondary
      CPUs were left running across the kexec call.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3d3f78d7
    • R
      ARM: Factor out common code from cpu_proc_fin() · 9ca03a21
      Russell King 提交于
      All implementations of cpu_proc_fin() start by disabling interrupts
      and then flush caches.  Rather than have every processors proc_fin()
      implementation do this, move it out into generic code - and move the
      cache flush past setup_mm_for_reboot() (so it can benefit from having
      caches still enabled.)
      
      This allows cpu_proc_fin() to become independent of the L1/L2 cache
      types, and eventually move the L2 cache flushing into the L2 support
      code.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9ca03a21
  5. 10 7月, 2010 1 次提交
    • R
      ARM: lockdep: fix unannotated irqs-on · ac78884e
      Russell King 提交于
      CPU: Testing write buffer coherency: ok
      ------------[ cut here ]------------
      WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
      Modules linked in:
      [<c0035120>] (unwind_backtrace+0x0/0xf8) from [<c0355374>] (dump_stack+0x20/0x24)
      [<c0355374>] (dump_stack+0x20/0x24) from [<c0060c04>] (warn_slowpath_common+0x58/0x70)
      [<c0060c04>] (warn_slowpath_common+0x58/0x70) from [<c0060c3c>] (warn_slowpath_null+0x20/0x24)
      [<c0060c3c>] (warn_slowpath_null+0x20/0x24) from [<c008f224>] (check_flags+0xcc/0x1dc)
      [<c008f224>] (check_flags+0xcc/0x1dc) from [<c00945dc>] (lock_acquire+0x50/0x140)
      [<c00945dc>] (lock_acquire+0x50/0x140) from [<c0358434>] (_raw_spin_lock+0x50/0x88)
      [<c0358434>] (_raw_spin_lock+0x50/0x88) from [<c00fd114>] (set_task_comm+0x2c/0x60)
      [<c00fd114>] (set_task_comm+0x2c/0x60) from [<c007e184>] (kthreadd+0x30/0x108)
      [<c007e184>] (kthreadd+0x30/0x108) from [<c0030104>] (kernel_thread_exit+0x0/0x8)
      ---[ end trace 1b75b31a2719ed1c ]---
      possible reason: unannotated irqs-on.
      irq event stamp: 3
      hardirqs last  enabled at (2): [<c0059bb0>] finish_task_switch+0x48/0xb0
      hardirqs last disabled at (3): [<c002f0b0>] ret_slow_syscall+0xc/0x1c
      softirqs last  enabled at (0): [<c005f3e0>] copy_process+0x394/0xe5c
      softirqs last disabled at (0): [<(null)>] (null)
      
      Fix this by ensuring that the lockdep interrupt state is manipulated in
      the appropriate places.  We essentially treat userspace as an entirely
      separate environment which isn't relevant to lockdep (lockdep doesn't
      monitor userspace.)  We don't tell lockdep that IRQs will be enabled
      in that environment.
      
      Instead, when creating kernel threads (which is a rare event compared
      to entering/leaving userspace) we have to update the lockdep state.  Do
      this by starting threads with IRQs disabled, and in the kthread helper,
      tell lockdep that IRQs are enabled, and enable them.
      
      This provides lockdep with a consistent view of the current IRQ state
      in kernel space.
      
      This also revert portions of 0d928b0b
      which didn't fix the problem.
      Tested-by: NMing Lei <tom.leiming@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ac78884e
  6. 15 6月, 2010 2 次提交
  7. 21 4月, 2010 1 次提交
    • R
      ARM: fix build error in arch/arm/kernel/process.c · 4260415f
      Russell King 提交于
      /tmp/ccJ3ssZW.s: Assembler messages:
      /tmp/ccJ3ssZW.s:1952: Error: can't resolve `.text' {.text section} - `.LFB1077'
      
      This is caused because:
      
      	.section .data
      	.section .text
      	.section .text
      	.previous
      
      does not return us to the .text section, but the .data section; this
      makes use of .previous dangerous if the ordering of previous sections
      is not known.
      
      Fix up the other users of .previous; .pushsection and .popsection are
      a safer pairing to use than .section and .previous.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      4260415f
  8. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  9. 09 1月, 2010 1 次提交
    • R
      ARM: 5868/1: ARM: fix "BUG: using smp_processor_id() in preemptible code" · 22325525
      Rabin Vincent 提交于
      Fix the following warning, which appears when the register dump for a
      faulting process is printed in a kernel with SMP, DEBUG_PREEMPT, and
      DEBUG_USER (with user_debug=31) enabled:
      
      BUG: using smp_processor_id() in preemptible [00000000] code: init/1
      caller is __show_regs+0x18/0x234
      Backtrace:
      [<c0159e5c>] (dump_backtrace+0x0/0x114) from [<c01faf30>] (dump_stack+0x18/0x1c)
       r6:c781a000 r5:c0157544 r4:00000001 r3:00000000
      [<c01faf18>] (dump_stack+0x0/0x1c) from [<c01e5230>] (debug_smp_processor_id+0xc4/0xf8)
      [<c01e516c>] (debug_smp_processor_id+0x0/0xf8) from [<c0157544>] (__show_regs+0x18/0x234)
       r6:c781bfb0 r5:00000000 r4:c781bfb0 r3:00000000
      [<c015752c>] (__show_regs+0x0/0x234) from [<c01577a0>] (show_regs+0x40/0x50)
      [<c0157760>] (show_regs+0x0/0x50) from [<c015c968>] (__do_user_fault+0x5c/0xa4)
       r4:c781c000 r3:00000000
      [<c015c90c>] (__do_user_fault+0x0/0xa4) from [<c015cbe0>] (do_page_fault+0x1b4/0x1e4)
       r7:00000000 r6:00010000 r5:c781bfb0 r4:c781c000
      [<c015ca2c>] (do_page_fault+0x0/0x1e4) from [<c01554c8>] (do_DataAbort+0x3c/0xa0)
      [<c015548c>] (do_DataAbort+0x0/0xa0) from [<c01560c4>] (ret_from_exception+0x0/0x10)
      Signed-off-by: NRabin Vincent <rabin@rab.in>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      22325525
  10. 18 12月, 2009 1 次提交
  11. 14 10月, 2009 1 次提交
  12. 24 7月, 2009 1 次提交
  13. 23 6月, 2009 1 次提交
    • R
      [ARM] idle: clean up pm_idle calling, obey hlt_counter · 9ccdac36
      Russell King 提交于
      pm_idle is used by infrastructure (eg, cpuidle) which expects architectures
      to call it in a certain way.  Arrange for ARM to follow x86's lead on this
      and call pm_idle() with interrupts already disabled.  However, we expect
      pm_idle() to enable interrupts before it returns.
      
      Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to
      prevent all calls to pm_idle.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9ccdac36
  14. 19 6月, 2009 1 次提交
  15. 30 5月, 2009 1 次提交
    • C
      Add core support for ARMv6/v7 big-endian · 26584853
      Catalin Marinas 提交于
      Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
      (byte-invariant). This patch adds the core support:
      
      - setting of the BE-8 mode via the CPSR.E register for both kernel and
        user threads
      - big-endian page table walking
      - REV used to rotate instructions read from memory during fault
        processing as they are still little-endian format
      - Kconfig and Makefile support for BE-8. The --be8 option must be passed
        to the final linking stage to convert the instructions to
        little-endian
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      26584853
  16. 03 4月, 2009 1 次提交
  17. 20 3月, 2009 1 次提交
    • R
      [ARM] pass reboot command line to arch_reset() · be093beb
      Russell King 提交于
      OMAP wishes to pass state to the boot loader upon reboot in order to
      instruct it whether to wait for USB-based reflashing or not.  There is
      already a facility to do this via the reboot() syscall, except we ignore
      the string passed to machine_restart().
      
      This patch fixes things to pass this string to arch_reset().  This means
      that we keep the reboot mode limited to telling the kernel _how_ to
      perform the reboot which should be independent of what we request the
      boot loader to do.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      be093beb
  18. 12 2月, 2009 1 次提交
  19. 06 9月, 2008 2 次提交
  20. 05 9月, 2008 1 次提交
    • R
      [ARM] sparse: fix several warnings · 09d9bae0
      Russell King 提交于
      arch/arm/kernel/process.c:270:6: warning: symbol 'show_fpregs' was not declared. Should it be static?
      
      This function isn't used, so can be removed.
      
      arch/arm/kernel/setup.c:532:9: warning: symbol 'len' shadows an earlier one
      arch/arm/kernel/setup.c:524:6: originally declared here
      
      A function containing two 'len's.
      
      arch/arm/mm/fault-armv.c:188:13: warning: symbol 'check_writebuffer_bugs' was not declared. Should it be static?
      arch/arm/mm/mmap.c:122:5: warning: symbol 'valid_phys_addr_range' was not declared. Should it be static?
      arch/arm/mm/mmap.c:137:5: warning: symbol 'valid_mmap_phys_addr_range' was not declared. Should it be static?
      
      Missing includes.
      
      arch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer
      arch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces)
      
      Sillies.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      09d9bae0
  21. 07 8月, 2008 1 次提交
  22. 19 7月, 2008 1 次提交
    • T
      nohz: prevent tick stop outside of the idle loop · b8f8c3cf
      Thomas Gleixner 提交于
      Jack Ren and Eric Miao tracked down the following long standing
      problem in the NOHZ code:
      
      	scheduler switch to idle task
      	enable interrupts
      
      Window starts here
      
      	----> interrupt happens (does not set NEED_RESCHED)
      	      	irq_exit() stops the tick
      
      	----> interrupt happens (does set NEED_RESCHED)
      
      	return from schedule()
      	
      	cpu_idle(): preempt_disable();
      
      Window ends here
      
      The interrupts can happen at any point inside the race window. The
      first interrupt stops the tick, the second one causes the scheduler to
      rerun and switch away from idle again and we end up with the tick
      disabled.
      
      The fact that it needs two interrupts where the first one does not set
      NEED_RESCHED and the second one does made the bug obscure and extremly
      hard to reproduce and analyse. Kudos to Jack and Eric.
      
      Solution: Limit the NOHZ functionality to the idle loop to make sure
      that we can not run into such a situation ever again.
      
      cpu_idle()
      {
      	preempt_disable();
      
      	while(1) {
      		 tick_nohz_stop_sched_tick(1); <- tell NOHZ code that we
      		 			          are in the idle loop
      
      		 while (!need_resched())
      		       halt();
      
      		 tick_nohz_restart_sched_tick(); <- disables NOHZ mode
      		 preempt_enable_no_resched();
      		 schedule();
      		 preempt_disable();
      	}
      }
      
      In hindsight we should have done this forever, but ... 
      
      /me grabs a large brown paperbag.
      
      Debugged-by: Jack Ren <jack.ren@marvell.com>, 
      Debugged-by: Neric miao <eric.y.miao@gmail.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      b8f8c3cf
  23. 13 5月, 2008 1 次提交
  24. 09 2月, 2008 2 次提交
  25. 20 10月, 2007 1 次提交
  26. 12 7月, 2007 1 次提交
  27. 18 6月, 2007 1 次提交
    • R
      [ARM] Update show_regs/oops register format · 154c772e
      Russell King 提交于
      Add the kernel release and version information to the output of
      show_regs/oops.  Add the CPU PSR register.  Avoid using printk
      to output partial lines; always output a complete line.
      
      Re-combine the "Control" and "Table + DAC" lines after nommu
      separated them; we don't want to waste vertical screen space
      needlessly.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      154c772e
  28. 22 4月, 2007 2 次提交
  29. 07 2月, 2007 1 次提交
    • R
      [ARM] Move processor_modes[] to .../process.c · ae0a846e
      Russell King 提交于
      bad_mode() currently prints the mode which caused the exception, and
      then causes an oops dump to be printed which again displays this
      information (since the CPSR in the struct pt_regs is correct.)  This
      leads to processor_modes[] being shared between traps.c and process.c
      with a local declaration of it.
      
      We can clean this up by moving processor_modes[] to process.c and
      removing the duplication, resulting in processor_modes[] becoming
      static.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ae0a846e
  30. 30 11月, 2006 1 次提交
    • P
      [ARM] 3911/2: Simplify alloc_thread_info on ARM · 12221442
      Paul Gortmaker 提交于
      Remove ARM local cache of 4 struct thread_info.
      Can cause oops under certain circumstances.
      
      Russell indicated the original optimization was
      required on older kernels to avoid thread starvation
      on memory fragmentation, but may no longer be
      required.  I've updated the patch to 19rc4 and
      ensured no <config.h> dain-bramage slipped in this
      time (sorry about that).
      
      Original description follows:
      
      I was given some test results which pointed to an
      Oops in alloc_thread_info (happened 2x), and after
      looking at the code, I see that ARM has its own
      local cache of 4 struct thread_info. There wasn't
      any clear (to me) synchronization between the
      alloc_thread_info and the free_thread_info.
      
      I looked over the other arch, and they all simply
      allocate them on an as needed basis, so I simplified
      the ARM to do the same, based on the other arch
      (e.g. PPC) and the folks doing the testing have
      indicated that this fixed the oops.
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      12221442
  31. 28 9月, 2006 1 次提交
    • H
      [ARM] nommu: manage the CP15 things · f12d0d7c
      Hyok S. Choi 提交于
      All the current CP15 access codes in ARM arch can be categorized and
      conditioned by the defines as follows:
      
           Related operation	Safe condition
        a. any CP15 access	!CPU_CP15
        b. alignment trap	CPU_CP15_MMU
        c. D-cache(C-bit)	CPU_CP15
        d. I-cache		CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
      				CPU_ARM720 || CPU_ARM740 ||
      				CPU_XSCALE || CPU_XSC3 )
        e. alternate vector	CPU_CP15 && !CPU_ARM740
        f. TTB		CPU_CP15_MMU
        g. Domain		CPU_CP15_MMU
        h. FSR/FAR		CPU_CP15_MMU
      
      For example, alternate vector is supported if and only if
      "CPU_CP15 && !CPU_ARM740" is satisfied.
      Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f12d0d7c
  32. 02 7月, 2006 1 次提交
  33. 01 7月, 2006 1 次提交
  34. 22 6月, 2006 1 次提交
    • R
      [ARM] Add thread_notify infrastructure · d6551e88
      Russell King 提交于
      Some machine classes need to allow VFP support to be built into the
      kernel, but still allow the kernel to run even though VFP isn't
      present.  Unfortunately, the kernel hard-codes VFP instructions
      into the thread switch, which prevents this being run-time selectable.
      
      Solve this by introducing a notifier which things such as VFP can
      hook into to be informed of events which affect the VFP subsystem
      (eg, creation and destruction of threads, switches between threads.)
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d6551e88
  35. 20 6月, 2006 1 次提交