Add a driver for the SDIO/MMC host found on the Amlogic Meson SoCs. This
is an MMC controller which provides an interface between the application
processor and various memory cards. It supports the SD specification
v2.0 and the eMMC specification v4.41.

The controller provides an internal "mux" which allows connecting up to
three MMC devices to it. Only one device can be used at a time though
since the registers are shared across all devices. The driver takes care
of synchronizing access (similar to the dw_mmc driver).
The maximum supported bus-width is 4-bits.

Amlogic's GPL kernel sources call the corresponding driver "aml_sdio" to
differentiate it from the other MMC controller in (at least the Meson8
and Meson8b) the SoCs (they call the other drivers aml_sdhc and
aml_sdhc_m8, which seem to support a bus-width of up to 8-bits). This
means that there are three different MMC host controller IP blocks from
Amlogic (each of them with completely own register layout and features):
- "SDIO": 1 and 4 bit bus width, support for high-speed modes up to
  UHS-I SDR50, part of Meson6, Meson8 and Meson8b (the driver from this
  patch targets this controller)
- "SDHC": 1, 4 and 8 bit bus width, compatible with standard iNAND
  interface, support for speeds up to HS200 and MMC spec up to version
  4.5x, part of Meson8 and Meson8b SoCs (there is no mainline driver
  for this controller yet)
- "SDEMMC": 1, 4 and 8 bit bus width, support for speeds up to HS400
  and MMC spec up to version 5.0, part of the Meson GX (64-bit) SoCs
  (supported by the meson-gx MMC host driver)
Signed-off-by: NCarlo Caione <carlo@endlessm.com>
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Without the ThunderX/OcteonTx GPIO driver the MMC driver
would not power up any MMC devices. Therefore add a
dependency to the GPIO driver and remove the unneeded GPIOLIB
dependency.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Acked-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Signed-off-by: NVijay Viswanath <vviswana@codeaurora.org>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Create a new sdhci-omap driver to configure the eMMC/SD/SDIO controller
in TI's OMAP SoCs making use of the SDHCI core library. For OMAP specific
configurations, populate sdhci_ops with OMAP specific callbacks and use
SDHCI quirks.
Enable only high speed mode for both SD and eMMC here and add other
UHS mode support later.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

MMC_DEBUG was moved and one letter got strangely capitalized.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It does not make sense for qcom dml code to be a seperate module, as
this has just 2 helper functions specific to qcom, and used directly by
mmci driver, so just compile this along with main mmci driver.

This would also fix issues arrising due to Kconfig combinations between
mmci and qcom dml.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

I cannot see why this is needed. kmap() should be safe in this case.
Signed-off-by: NIan Molton <ian@mnementh.co.uk>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

We have removed all code depending on CONFIG_MMC_DEBUG
from mmc core now. So it's safe to make CONFIG_MMC_DEBUG
just for host drivers only and we expect to kill this option
in the future.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

shdci-st driver can be used for ppc476 fsp2 soc.
Signed-off-by: NIvan Mikhaylov <ivan@de.ibm.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add a new variant of the SDHI driver to support R-Car Gen3 with DMA via
on-chip bus mastering.  Since the DMAC is in a part of the SDHI module it
is not suitable to be used via DMA Engine.

Clearing of DM_CM_INFO1 after DMA thanks to Dirk Behme

Cc: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NAi Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Rename the source file SDHI. A follow-up patch will make it a library
file used by a different top-level module file.

The name "renesas" is chosen as the SDHI driver is applicable to a wider
range of SoCs than SH-Mobile it seems to be a more appropriate name.
However, the SDHI driver source itself, is left as sh_mobile_sdhi to
avoid unnecessary churn.

the name "core" was chosen to reflect the desired role of this file,
to provide core functionality to the sdhi driver. A follow-up patch will
move the file into that role.

Internal symbols have also been renamed to reflect the filename change.

The .name member of struct platform_driver and parameter to
MODULE_ALIAS() have not been changed in order to avoid the complication
of potentially breaking SH SoCs which still use platform drivers.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

AVR32 is gone. Now it's time to clean up the driver by removing
leftovers that was used by AVR32 related code.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add platform driver for Octeon SOCs.
Signed-off-by: NSteven J. Hill <Steven.Hill@cavium.com>
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add Xenon eMMC/SD/SDIO host controller core functionality.
Add Xenon specific initialization process.
Add Xenon specific mmc_host_ops APIs.
Add Xenon specific register definitions.

Add CONFIG_MMC_SDHCI_XENON support in drivers/mmc/host/Kconfig.

Marvell Xenon SDHC conforms to SD Physical Layer Specification
Version 3.01 and is designed according to the guidelines provided
in the SD Host Controller Standard Specification Version 3.00.
Signed-off-by: NHu Ziji <huziji@marvell.com>
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add a platform driver for ThunderX ARM SOCs.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The 2835 has two SD controllers: The Arasan sdhci controller (supported
by the iproc driver) and a custom sdhost controller.  This patch adds a
driver for the latter.

The sdhci controller supports both sdcard and sdio.  The sdhost
controller supports the sdcard only, but has better performance.  Also
note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost
controller allows to use the sdhci controller for wifi support.

The configuration is done by devicetree via pin muxing.  Both SD
controller are available on the same pins (2 pin groups = pin 22 to 27 +
pin 48 to 53).  So it's possible to use both SD controllers at the same
time with different pin groups.

The code was originally written by Phil Elwell in the downstream
Rasbperry Pi tree.   In preparation for the upstream merge it was
cleaned up and the code base was moderized by Eric Anholt, Stefan
Wahren and Gerd Hoffmann.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This platform driver adds initial support for the DW host controller
found on ZTE SoCs.

It has been tested on ZX296718 EVB board currently. More support on
timing tuning will be added when hardware is available.
Signed-off-by: NJun Nie <jun.nie@linaro.org>
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.

For SD, it basically relies on the SDHCI standard code.
For eMMC, this driver provides some callbacks to support the
hardware part that is specific to this IP design.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

I see no override of read/write callbacks in sdhci-of-at91.c.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to match SoC.
And fix host version to avoid that incorrect version numbers break down
the ADMA data transfer.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>
Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NScott Wood <oss@buserror.net>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Initial support for the SD/eMMC controller in the Amlogic S905/GX*
family of SoCs.
Signed-off-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock in order to function
properly.  Let's add the ability to expose this clock.  Any PHY that
needs to know the clock rate can add a reference and query the clock
rate.

At the moment we register a CLK_GET_RATE_NOCACHE clock that simply
allows querying the clock.  This allows us to be less intrusive with
regards to the main SDHCI driver, which has complex logic for adjusting
the SD clock.  Right now we always fully power cycle the PHY when the
clock changes and that gives the PHY a good chance to query our clock.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add SDHCI driver for Broadcom BRCMSTB SoCs.
This driver works with all ARM based SoCs and the 7425, 7429
and 7435 MIPS based SoCs.

The driver disables all UHS speed modes by default and relies
on the Device Tree node properties to enable these modes for
SoC/Board combinations that support them.
Signed-off-by: NAl Cooper <alcooperx@gmail.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The sdhci-bcm2835 is no more needed since it has been replaced
by sdhci-iproc.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Acked-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

There is no support for this platform in the kernel anymore. Make the
Kconfig text more generic, so it won't get stale anymore.
Reported-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Baytrail eMMC/SD/SDIO host controllers have been known to
hang.  A change to a hardware setting has been found to
reduce the occurrence of such hangs.  This patch ensures
the correct setting.

This patch applies cleanly to v4.4+.  It could go to
earlier kernels also, so I will send backports to the
stable list in due course.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org # v4.4+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Registers are 64bit apart, so we refactor bus_shift handling a little and set
it based on the DT compatible. Also, EXT_ACC is different. It has been tested
on a Salvator-X (Gen3) and, to check for regressions, on a Lager (Gen2).
Signed-off-by: NAi Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This driver supports the SDHCI host controller found on a PIC32.
Signed-off-by: NAndrei Pistirica <andrei.pistirica@microchip.com>
Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>

Scott Branden from Broadcom said that the BCM2835 eMMC IP core is
very similar to IPROC and share most of the quirks. So use this driver
instead of separate one.

The sdhci-iproc contains a better workaround for the clock domain
crossing problem which doesn't need any delays. This results in a
better write performance.

Btw we get the rid of the SDHCI_CAPABILITIES hack in the sdhci_readl
function.
Suggested-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Acked-by: NEric Anholt <eric@anholt.net>
Acked-by: NScott Branden <sbranden@broadcom.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

I don't see a reason why a host driver should depend on the card driver.
It also prevents that we can use the mmc_test driver. So, remove it.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

There are no in-kernel users of the MVSDIO platform data method
(instantiating from a board file) so just delete this code and
make this a DT-only driver. We depend on OF and check that we have
an OF node in probe().

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

If NO_DMA=y:

    ERROR: dma_unmap_sg [drivers/mmc/host/android-goldfish.ko] undefined!
    ERROR: dma_alloc_coherent [drivers/mmc/host/android-goldfish.ko] undefined!
    ERROR: dma_map_sg [drivers/mmc/host/android-goldfish.ko] undefined!
    ERROR: dma_free_coherent [drivers/mmc/host/android-goldfish.ko] undefined!

Add a dependency on HAS_DMA to fix this.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Enable omap_hsmmc for Keystone 2 architecture which reuses the HSMMC
IP found on OMAP platforms.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these platforms. I've tested it on RK31xx
platform with edmac mode and RK3288 platform with idmac mode.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The driver depends on GOLDFISH but there isn't a build dependency
so it's a good idea to allow the driver to always be built when the
COMPILE_TEST option is enabled.

That way, the driver can be built with a config generated by make
allyesconfig and check if a patch would break the build.
Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Freescale eSDHC driver now supports both little-endian and
big-endian mode eSDHC IPs for ARM and PPC. So, MMC_SDHCI_OF_ESDHC
option needs to be reconfigured.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Introduce driver for he Atmel SDMMC available on sama5d2. It is a sdhci
compliant controller.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

If NO_DMA=y:

    ERROR: "dma_alloc_coherent" [drivers/mmc/host/mtk-sd.ko] undefined!
    ERROR: "dma_unmap_sg" [drivers/mmc/host/mtk-sd.ko] undefined!
    ERROR: "dma_map_sg" [drivers/mmc/host/mtk-sd.ko] undefined!
    ERROR: "dma_free_coherent" [drivers/mmc/host/mtk-sd.ko] undefined!

Add a dependency on HAS_DMA to fix this.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add Mediatek MMC driver code
Support eMMC/SD/SDIO
Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>