1. 11 12月, 2008 11 次提交
  2. 10 12月, 2008 7 次提交
  3. 08 12月, 2008 6 次提交
  4. 07 12月, 2008 1 次提交
  5. 06 12月, 2008 3 次提交
  6. 05 12月, 2008 9 次提交
  7. 04 12月, 2008 3 次提交
    • A
      x86: fix early panic with boot option "nosmp" · 9adc1386
      Andi Kleen 提交于
      Impact: fix boot crash with numcpus=0 on certain systems
      
      Fix early exception in __get_smp_config with nosmp.
      
      Bail out early when there is no MP table.
      Reported-by: NWu Fengguang <fengguang.wu@intel.com>
      Signed-off-by: NAndi Kleen <ak@linux.intel.com>
      Tested-by: NWu Fengguang <fengguang.wu@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9adc1386
    • N
      [ARM] 5339/1: fix __fls() on ARM · 94fc7336
      Nicolas Pitre 提交于
      Commit 0c65f459 intended to fix truncation issues with fls() on
      ARMv5+ by renaming it to __fls() and wrapping it into a C function.
      However that didn't take into account the fact that __fls() already
      already had different semantics in the kernel.
      
      Let's move the __fls() code into fls() function directly, and redefine
      __fls() with the appropriate semantics.  While at it, bring a generic
      __fls() definition for pre ARMv5 too.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      94fc7336
    • J
      sparc64: Fix VIS emulation bugs · 726c12f5
      Joseph Myers 提交于
      This patch fixes some bugs in VIS emulation that cause the GCC test
      failure
      
      FAIL: gcc.target/sparc/pdist-3.c execution test
      
      for both 32-bit and 64-bit testing on hardware lacking these
      instructions.  The emulation code for the pdist instruction uses
      RS1(insn) for both source registers rs1 and rs2, which is obviously
      wrong and leads to the instruction doing nothing (the observed
      problem), and further inspection of the code shows that RS1 uses a
      shift of 24 and RD a shift of 25, which clearly cannot both be right;
      examining SPARC documentation indicates the correct shift for RS1 is
      14.
      
      This patch fixes the bug if single-stepping over the affected
      instruction in the debugger, but not if the testcase is run
      standalone.  For that, Wind River has another patch I hope they will
      send as a followup to this patch submission.
      Signed-off-by: NJoseph Myers <joseph@codesourcery.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      726c12f5