1. 15 1月, 2015 5 次提交
  2. 16 12月, 2014 1 次提交
  3. 23 11月, 2014 1 次提交
  4. 26 9月, 2014 1 次提交
    • Y
      iommu/irq_remapping: Fix the regression of hpet irq remapping · 5fc24d8c
      Yijing Wang 提交于
      Commit 71054d88 ("x86, hpet: Introduce x86_msi_ops.setup_hpet_msi")
      introduced x86_msi_ops.setup_hpet_msi to setup hpet MSI irq
      when irq remapping enabled. This caused a regression of
      hpet MSI irq remapping.
      
      Original code flow before commit 71054d88:
      hpet_setup_msi_irq()
      	arch_setup_hpet_msi()
      		setup_hpet_msi_remapped()
      			remap_ops->setup_hpet_msi()
      				alloc_irte()
      		msi_compose_msg()
      		hpet_msi_write()
      		...
      
      Current code flow after commit 71054d88:
      hpet_setup_msi_irq()
      	x86_msi.setup_hpet_msi()
      		setup_hpet_msi_remapped()
      			intel_setup_hpet_msi()
      				alloc_irte()
      
      Currently, we only call alloc_irte() for hpet MSI, but
      do not composed and wrote its msg...
      Signed-off-by: NYijing Wang <wangyijing@huawei.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      5fc24d8c
  5. 16 5月, 2014 1 次提交
  6. 09 1月, 2014 1 次提交
  7. 30 12月, 2013 1 次提交
  8. 04 6月, 2013 2 次提交
    • A
      x86/MSI: Conserve interrupt resources when using multiple-MSIs · 13da7a34
      Alexander Gordeev 提交于
      Current multiple-MSI implementation does not take into account actual
      number of requested MSIs and always rounds that number to a larger
      power-of-two value.  Yet, the number of MSIs a PCI device could send (and
      therefore the number of messages a device driver could request) may be
      smaller.  As result, resources allocated for extra MSIs are just wasted.
      
      This update takes advantage of 'msi_desc::nvec_used' field introduced with
      generic MSI code to track the number of requested and used MSIs.  As
      result, resources associated with interrupts are conserved.  Of those
      resources most noticeable are x86 interrupt vectors.
      
      The initial version of this fix also conserved IRTEs, but Jan noticed that
      a malfunctioning PCI device might send a message number it did not claim
      and thus refer to an IRTE it does not own.  To avoid this security hole,
      as many IRTEs are reserved as the device could possibly send.
      
      [bhelgaas: changelog, rename to "nvec_used"]
      Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NJoerg Roedel <joro@8bytes.org>
      13da7a34
    • A
      x86/MSI: Conserve interrupt resources when using multiple-MSIs · 5fec9451
      Alexander Gordeev 提交于
      Current multiple-MSI implementation does not take into account actual
      number of requested MSIs and always rounds that number to a larger
      power-of-two value.  Yet, the number of MSIs a PCI device could send (and
      therefore the number of messages a device driver could request) may be
      smaller.  As result, resources allocated for extra MSIs are just wasted.
      
      This update takes advantage of 'msi_desc::nvec_used' field introduced with
      generic MSI code to track the number of requested and used MSIs.  As
      result, resources associated with interrupts are conserved.  Of those
      resources most noticeable are x86 interrupt vectors.
      
      The initial version of this fix also conserved IRTEs, but Jan noticed that
      a malfunctioning PCI device might send a message number it did not claim
      and thus refer to an IRTE it does not own.  To avoid this security hole,
      as many IRTEs are reserved as the device could possibly send.
      
      [bhelgaas: changelog, rename to "nvec_used"]
      Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      5fec9451
  9. 18 4月, 2013 1 次提交
    • N
      iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets · 03bbcb2e
      Neil Horman 提交于
      A few years back intel published a spec update:
      http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
      
      For the 5520 and 5500 chipsets which contained an errata (specificially errata
      53), which noted that these chipsets can't properly do interrupt remapping, and
      as a result the recommend that interrupt remapping be disabled in bios.  While
      many vendors have a bios update to do exactly that, not all do, and of course
      not all users update their bios to a level that corrects the problem.  As a
      result, occasionally interrupts can arrive at a cpu even after affinity for that
      interrupt has be moved, leading to lost or spurrious interrupts (usually
      characterized by the message:
      kernel: do_IRQ: 7.71 No irq handler for vector (irq -1)
      
      There have been several incidents recently of people seeing this error, and
      investigation has shown that they have system for which their BIOS level is such
      that this feature was not properly turned off.  As such, it would be good to
      give them a reminder that their systems are vulnurable to this problem.  For
      details of those that reported the problem, please see:
      https://bugzilla.redhat.com/show_bug.cgi?id=887006
      
      [ Joerg: Removed CONFIG_IRQ_REMAP ifdef from early-quirks.c ]
      Signed-off-by: NNeil Horman <nhorman@tuxdriver.com>
      CC: Prarit Bhargava <prarit@redhat.com>
      CC: Don Zickus <dzickus@redhat.com>
      CC: Don Dutile <ddutile@redhat.com>
      CC: Bjorn Helgaas <bhelgaas@google.com>
      CC: Asit Mallick <asit.k.mallick@intel.com>
      CC: David Woodhouse <dwmw2@infradead.org>
      CC: linux-pci@vger.kernel.org
      CC: Joerg Roedel <joro@8bytes.org>
      CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      CC: Arkadiusz Miśkiewicz <arekm@maven.pl>
      Signed-off-by: NJoerg Roedel <joro@8bytes.org>
      03bbcb2e
  10. 26 3月, 2013 1 次提交
  11. 28 1月, 2013 13 次提交
  12. 28 9月, 2012 1 次提交
  13. 17 7月, 2012 1 次提交
  14. 15 6月, 2012 1 次提交
  15. 08 5月, 2012 1 次提交
  16. 07 5月, 2012 8 次提交