1. 12 11月, 2009 1 次提交
    • A
      intel-iommu: Obey coherent_dma_mask for alloc_coherent on passthrough · e8bb910d
      Alex Williamson 提交于
      The model for IOMMU passthrough is that decent devices that can cope
      with DMA to all of memory get passthrough; crappy devices with a limited
      dma_mask don't -- they get to use the IOMMU anyway.
      
      This is done on the basis that IOMMU passthrough is usually wanted for
      performance reasons, and it's only the decent PCI devices that you
      really care about performance for, while the crappy 32-bit ones like
      your USB controller can just use the IOMMU and you won't really care.
      
      Unfortunately, the check for this was only looking at dev->dma_mask, not
      at dev->coherent_dma_mask. And some devices have a 32-bit
      coherent_dma_mask even though they have a full 64-bit dma_mask.
      
      Even more unfortunately, fixing that simple oversight would upset
      certain broken HP devices. Not only do they have a 32-bit
      coherent_dma_mask, but they also have a tendency to do stray DMA to
      unmapped addresses. And then they die when they take the DMA fault they
      so richly deserve.
      
      So if we do the 'correct' fix, it'll mean that affected users have to
      disable IOMMU support completely on "a large percentage of servers from
      a major vendor."
      
      Personally, I have little sympathy -- given that this is the _same_
      'major vendor' who is shipping machines which claim to have IOMMU
      support but have obviously never _once_ booted a VT-d capable OS to do
      any form of QA. But strictly speaking, it _would_ be a regression even
      though it only ever worked by fluke.
      
      For 2.6.33, we'll come up with a quirk which gives swiotlb support
      for this particular device, and other devices with an inadequate
      coherent_dma_mask will just get normal IOMMU mapping.
      
      The simplest fix for 2.6.32, though, is just to jump through some hoops
      to try to allocate coherent DMA memory for such devices in a place that
      they can reach. We'd use dma_generic_alloc_coherent() for this if it
      existed on IA64.
      Signed-off-by: NAlex Williamson <alex.williamson@hp.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      e8bb910d
  2. 10 11月, 2009 1 次提交
    • D
      intel-iommu: Check for 'DMAR at zero' BIOS error earlier. · 86cf898e
      David Woodhouse 提交于
      Chris Wright has some patches which let us fall back to swiotlb nicely
      if IOMMU initialisation fails. But those are a bit much for 2.6.32.
      
      Instead, let's shift the check for the biggest problem, the HP and Acer
      BIOS bug which reports a DMAR at physical address zero. That one can
      actually be checked much earlier -- before we even admit to having
      detected an IOMMU in the first place. So the swiotlb init goes ahead as
      we want.
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      86cf898e
  3. 08 11月, 2009 2 次提交
  4. 07 11月, 2009 15 次提交
  5. 06 11月, 2009 13 次提交
  6. 05 11月, 2009 8 次提交