Since turning on idle-halt in commit fe46aa67 (ARM: at91/dt: add
sam9 watchdog default options to SoCs), SoCs compatible with at91sam9260-wdt
no longer reboot if the watchdog times out while the CPU is in idle state.
Removing the 'idle-halt' flag that was set by default fixes this.
Signed-off-by: NMichel Marti <mma@objectxp.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NSylvain Rochet <sylvain.rochet@finsecur.com>
[nicolas.ferre@atmel.com: rework the commit message]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add nodes for the SRAM available on atmel SoCs
For the at91sam9260 and the at91sam9g20, address mirroring is used to create a
single contiguous SRAM range instead of declaring two separate banks.

Also remove leftover TODOs in the sam9g45 file
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: correct at91sam9rl sram size => 0x10000]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add node for the RTC available on the at91sam9n12.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

udphs_clk (USB Device Controller clock) is referenced instead of
uhphs_clk (USB Host Controller clock).
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Make the ram controller driver take the ddrck clock for at91sam9n12 and
at91sam9x5.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Having clocks grouped in a subnode is common practice, so move the crystals
under a clocks node for the at91sam9n12 SoC and at91sam9n12 based boards.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Define sam9n12 clocks and make use of them in peripheral definitions.
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add the "atmel,nand-has-dma" property to NAND node for SoC that
can use the DMA to perform NAND accesses.
Use of this property was added in 1b719265
(mtd: atmel_nand: add a new dt binding item for nand dma support).
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris BREZILLON <b.brezillon@overkiz.com>

Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Add PWM device node for AT91 series SoC.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add ssc dma parameter for at91sam9n12
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add pinctrl of TWI for at91sam9n12 SoC.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds pinctrl configurations for at91 Timer Counter blocks.
These pin definitions can be referenced by "atmel,tcb-pwm" devices to
setup pins as PWM output for instance.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: switch to pinctrl pre-processor macros]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

at91sam9x5, at91sam9n12
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Tested-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

to prepare the switch to the macro.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Tested-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12]
[wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add DMA resources to MCI nodes.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: correct 9g45, 9n12 dma phandle name]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add DMA resources to i2c nodes.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: correct 9n12 dma phandle name]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Moving to generic DMA DT binding involves to set #dma-cells to 2.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Default ecc correctable setting is 2bits in 512 bytes.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Fix the use of USART on both at91sam9x5 and at91sam9n12. In DTS, the
atmel,use-dma-[rx|tx] property is present but a DMA channel cannot be used.
Indeed the connexion between the DMA engine and the slave is not implemented
yet in Device Tree.
Note however that this property is also used for PDC (private DMA) on older
SoCs. This is why the driver alone cannot determine the validity of this
property.
Reported-by: NDouglas Gilbert <dgilbert@interlog.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> [3.8+]

Add pinctrl support for SSC on AT91 dtsi files.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
[nicolas.ferre@atmel.com: split dtsi and driver changes]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Reluctantly-acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Add mci controller nodes to atmel SOCs.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

as we just use the rts and not the rts & cts for rs485
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

USART are the full pin uart
DBGU the debug Unit
UART the two pin uart
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Set the dbgu pinctrl config by default as we have only one possible config
For other uart set the rxd/txd by default.

For at91sam9x5ek create soc based dts as we need to include specific soc dtsi.
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux
controller
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>