The contents of arch/mips/kernel/perf_event.c and
arch/mips/kernel/perf_event_mipsxx.c were divided in a seemingly ad
hoc manner, with the first including the second.

I moved all the hardware counter support code to perf_event_mipsxx.c
and removed the gating #ifdefs to the Kconfig and Makefile.

Now perf_event.c contains only the callchain support, everything else
is in perf_event_mipsxx.c

There are no code changes, only moving of functions from one file to
the other, or removing empty unneeded functions.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Dezhong Diao <dediao@cisco.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2791/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Get rid of a bunch of useless inline declarations, and join a bunch of
improperly split lines.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2793/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2789/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Detect cn61XX, cn66XX and cn68XX CPUs in cpu_probe_cavium().
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2777/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2776/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It seems that BSP could be setup twice, but the nlm_cpu_ready array is only
set for ASPs in smpboot.S, not including BSP.
Signed-off-by: NHillf Danton <dhillf@gmail.com>
Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2695/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>,

Check the trigger direction for the triggered IRQ instead of the parent IRQ.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/2433/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We already know the base IRQ for a GPIO chip, so there is no need to
recalculate it in the demux handler.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Lars-Peter Clausen <lars@metafoo.de>
Patchwork: http://patchwork.linux-mips.org/patch/2432/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq
chips.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2434/
Patchwork: https://patchwork.linux-mips.org/patch/2771/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that no driver any longer depends on the CONFIG_SOC_AU1???  symbols,
it's time to get rid of them: Move some of the platform devices to the
boards which can use them, Rename a few (unused) constants in the header,
Replace them with MIPS_ALCHEMY in the various Kconfig files.  Finally
delete them altogether from the Alchemy Kconfig file.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2707/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

No longer required
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2705/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h

This patch gets rid of all CONFIG_SOC_AU1XXX defines in
DMA/DBDMA-related code.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2704/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

au1xxx-ide uses defines from the pb1200/db1200 headers:
get DBDMA ID through platform resource information,
hardcode register spacing.  The only 2 users of this driver (and
the only boards it can really work on realiably) use the same
register layout.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-ide@vger.kernel.org
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-ide@vger.kernel.org
Acked-by: NDavid S. Miller <davem@davemloft.net>
Patchwork: https://patchwork.linux-mips.org/patch/2716/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

- Rewrite Alchemy PCI support as a platform driver.
- Fixup boards which have PCI.

Run-tested on DB1500 and DB1550.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2706/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/pci.c
 delete mode 100644 arch/mips/pci/fixup-au1000.c
 delete mode 100644 arch/mips/pci/ops-au1000.c
 create mode 100644 arch/mips/pci/pci-alchemy.c

remove all redundant peripheral base address defines, fix
all affected boards and drivers.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2700/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use runtime CPU detection to setup all USB parts.
Remove the Au1200 OTG and UDC platform devices since there are no
drivers for them anyway.
Clean up the USB address mess in the au1000 header.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2703/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Alchemy chips have one or more registers which control access
to the usb blocks as well as PHY configuration.  I don't want
the OHCI/EHCI glues to know about the different registers and bits;
new code hides the gory details of USB configuration from them.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-usb@vger.kernel.org
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2709/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 create mode 100644 drivers/usb/host/alchemy-common.c

For Alchemy-PCI I need to add a wired entry after resuming from RAM;
remove the __init from add_wired_entry() so that this actually works.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2684/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replace all occurrences of CONFIG_SOC_AU1??? with runtime feature detection.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-mmc@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2683/Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

For GPIOLIB=y decide at runtime which gpiochips to register;
in the GPIOLIB=n case, the gpio headers need to be reshuffled
a bit to make multiple implementations coexist peacefully.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2679/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

No reason NOT to build it
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2678/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch removes the last hardcoded base address from the au1000_eth
driver.  The base address of the MACDMA unit was derived from the
platform device id; if someone registered the MACs in inverse order
both would not work.
So instead pass the base address of the DMA unit to the driver with
the other platform resource information.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
Acked-by: NDavid S. Miller <davem@davemloft.net>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2674/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

When trying to compile the 3.1-rc10 kernel for my MIPS board with C=1
(sparse checking), the build fails early with the error:

	  CHK     include/linux/version.h
	  UPD     include/linux/version.h
	  CHK     include/generated/utsrelease.h
	  UPD     include/generated/utsrelease.h
	  Checking missing-syscalls for N32
	  CALL    scripts/checksyscalls.sh
	  Checking missing-syscalls for O32
	  CALL    scripts/checksyscalls.sh
	  CC      kernel/bounds.s
	  GEN     include/generated/bounds.h
	  CC      arch/mips/kernel/asm-offsets.s
	  GEN     include/generated/asm-offsets.h
	  CALL    scripts/checksyscalls.sh
	  HOSTCC  scripts/genksyms/genksyms.o
	  SHIPPED scripts/genksyms/lex.lex.c
	  SHIPPED scripts/genksyms/keywords.hash.c
	  SHIPPED scripts/genksyms/parse.tab.h
	  HOSTCC  scripts/genksyms/lex.lex.o
	  SHIPPED scripts/genksyms/parse.tab.c
	  HOSTCC  scripts/genksyms/parse.tab.o
	  HOSTLD  scripts/genksyms/genksyms
	/bin/sh: Syntax error: "(" unexpected
	make[3]: *** [scripts/mod/empty.o] Error 2
	make[2]: *** [scripts/mod] Error 2
	make[1]: *** [scripts] Error 2

It seems the shell chokes because sparse is called with command line
arguments such as:

	-D__INT8_C(c)='c'

Converting these to form:

	-D'__INT8_C(c)'='c'

seems to fix the problem.

[ralf@linux-mips.org: This affects builds with gcc 4.5 and newer.]
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2827/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

After the recent cleanup of the register_*_smp_ops() functions msp71xx
wasn't fixed to include the now necessary header resulting in:

/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c: In function ‘prom_init’:
/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c:231:2: error: implicit declaration of function ‘register_vsmp_smp_ops’ [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use -march=xlr if available, otherwise fallback to mips64. This allows
us to support compilation with MIPS toolchains which are not customized
for XLR.

[ralf@linux-mips.org: And more importantly it works around a gas bug in
binutils 2.21 which otherwise may result in an assertion failure building
arch/mips/kernel/genex.S.  See
http://sourceware.org/bugzilla/show_bug.cgi?id=12915 for details.]
Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2534/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add __init and __cpuinit annotation to functions that need it.
Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2535/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This reverts commit 97475f8b42e83be2966aa2d70ab9c98477701c53 (lmo) /
82b89152 (kernel.org) [MIPS: LD/SD o32
macro GAS fix update].

Turns out this patch is producing many build errors with gcc 4.2.  Based
on further testing with a test case extracted from the build errors found
further build errors and suboptimal generation even in violation of the
"R" constraint.

To make matters worse, the binutils changes also don't work quite as
intended so revert this patch for now.

If Open Firmware / Device Tree support is enabled on a SNI RM kernel both
<asm/mipsprom.h> and <asm/prom.h> will be included into some .c files.
Since both headers use the same wrapper symbol only the inclusion of the
first file will have an effect but the 2nd file will be ignored resulting
in a build error.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Triggered by pnx8550-jbs_defconfig and pnx8550-stb810_defconfig:

WARNING: vmlinux.o(.text+0xc0c): Section mismatch in reference from the function prom_getcmdline() to the variable .init.data:arcs_cmdline
The function prom_getcmdline() references
the variable __initdata arcs_cmdline.
This is often because prom_getcmdline lacks a __initdata
annotation or the annotation of arcs_cmdline is wrong.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The number of arguments only matters for syscalls with stack arguments that
is using 5 or more argument slots so this is just cosmetic fix.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

WARNING: vmlinux.o(.text+0x3059f8): Section mismatch in reference from the function pcibios_plat_dev_init() to the function .devinit.text:request_bridge_irq()
The function pcibios_plat_dev_init() references
the function __devinit request_bridge_irq().
This is often because pcibios_plat_dev_init lacks a __devinit
annotation or the annotation of request_bridge_irq is wrong.

Fixing this one leads to:

WARNING: vmlinux.o(.text+0x1790): Section mismatch in reference from the function request_bridge_irq() to the function .devinit.text:register_bridge_irq()
The function request_bridge_irq() references
the function __devinit register_bridge_irq().
This is often because request_bridge_irq lacks a __devinit
annotation or the annotation of register_bridge_irq is wrong.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did
not exist on MIPS resulting in heavy cache corruption on XFS filesystems.

Left for the post-3.0 time: optimization and make this work with highmem,
too.  Since the combination of highmem + cache aliases atm doesn't work
this isn't a regression.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2505/

The 2 functions add_mtd_partitions and del_mtd_partitions were renamed to
mtd_device_register and mtd_device_unregister.
Signed-of-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2463/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The size is always valid, but variable-length arrays generate worse code
for no good reason (unless the function happens to be inlined and the
compiler sees the length for the simple constant it is).

Also, there seems to be some code generation problem on POWER, where
Henrik Bakken reports that register r28 can get corrupted under some
subtle circumstances (interrupt happening at the wrong time?).  That all
indicates some seriously broken compiler issues, but since variable
length arrays are bad regardless, there's little point in trying to
chase it down.

"Just don't do that, then".
Reported-by: NHenrik Grindal Bakken <henribak@cisco.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: stable@kernel.org
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
  ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS
  ARM: 7122/1: localtimer: add header linux/errno.h explicitly
  ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9
  ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES

This is unneeded and causes an abort on the SPMP8000 platform.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NZoltan Devai <zoss@devai.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Per the text in  Documentation/SubmitChecklist as below, we should
explicitly have header linux/errno.h in localtimer.h for ENXIO
reference.

1: If you use a facility then #include the file that defines/declares
   that facility.  Don't depend on other header files pulling in ones
   that you use.

Otherwise, we may run into some compiling error like the following one,
if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined.

  arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’:
  arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function)
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Using COHERENT_LINE_{MISS,HIT} for cache misses and references
respectively is completely wrong. Instead, use the L1D events which
are a better and more useful approximation despite ignoring instruction
traffic.
Reported-by: NAlasdair Grant <alasdair.grant@arm.com>
Reported-by: NMatt Horsnell <matt.horsnell@arm.com>
Reported-by: NMichael Williams <michael.williams@arm.com>
Cc: stable@kernel.org
Cc: Jean Pihet <j-pihet@ti.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>