1. 19 4月, 2012 1 次提交
  2. 05 3月, 2012 1 次提交
    • S
      ARM: dt: Explicitly configure all serial ports on Tegra Cardhu · 8c690fdf
      Stephen Warren 提交于
      The ports are used as follows:
      UART1/A: Routed to debug dongle
      UART2/B: GPS
      UART3/C: Bluetooth
      UART4/D: Routed to debug dongle
      UART5/E: Not connected
      
      The debug dongle has jumpers to connect either UART1/A or UART4/D to
      the DB-9 connector. UART1/A is typically used on Cardhu, and is the option
      we assume here.
      
      For now, only enable UART1/A, and explicitly disable all other ports.
      
      The explicit disable prevents the message "of_serial 70006040.serial:
      no clock-frequency property set" being printed during boot.
      
      Enabling the other ports requires their clocks to be enabled, or accesses
      to the registers will hang. At present, this requires adding entries into
      board-dt-tegra30.c's tegra_dt_clk_init_table[]. Lets punt on that and wait
      for the common clock bindings to set this all up, although that will also
      requiring adding clock support to 8250.c.
      
      While we're at it, fix board-dt-tegra30.c to enable the correct clock for
      the debug UART. We got away with this before, because the bootloader already
      enabled it.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      8c690fdf
  3. 27 2月, 2012 1 次提交
  4. 18 12月, 2011 1 次提交