1. 04 12月, 2006 6 次提交
    • B
      [POWERPC] Resolve the parent address of a PCI bus range · e557a1c9
      Benjamin Herrenschmidt 提交于
      When parsing the OF "ranges" properties of PCI host busses to determine
      the mapping of a PCI bus, we need to translate the "parent" address using
      the prom_parse.c routines in order to obtain a CPU physical address.
      
      This wasn't necessary while PCI busses were always at the root of the
      device-tree but this is no longer the case on Cell where they can be
      anywhere in the tree.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e557a1c9
    • B
      [POWERPC] Refactor 64 bits DMA operations · 12d04eef
      Benjamin Herrenschmidt 提交于
      This patch completely refactors DMA operations for 64 bits powerpc. 32 bits
      is untouched for now.
      
      We use the new dev_archdata structure to add the dma operations pointer
      and associated data to struct device. While at it, we also add the OF node
      pointer and numa node. In the future, we might want to look into merging
      that with pci_dn as well.
      
      The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced
      by a set of generic iommu and direct DMA ops (non PCI specific) that can be
      used by bus types. The toplevel implementation is now inline.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      12d04eef
    • B
      [POWERPC] Souped-up of_platform_device support · 7eebde70
      Benjamin Herrenschmidt 提交于
      This patch first splits of_device.c and of_platform.c, the later containing
      the bits relative to of_platform_device's. On the "breaks" side of things,
      drivers uisng of_platform_device(s) need to include asm/of_platform.h now
      and of_(un)register_driver is now of_(un)register_platform_driver.
      
      In addition to a few utility functions to locate of_platform_device(s),
      the main new addition is of_platform_bus_probe() which allows the platform
      code to trigger an automatic creation of of_platform_devices for a whole
      tree of devices.
      
      The function acts based on the type of the various "parent" devices encountered
      from a provided root, using either a default known list of bus types that can be
      "probed" or a passed-in list. It will only register devices on busses matching
      that list, which mean that typically, it will not register PCI devices, as
      expected (since they will be picked up by the PCI layer).
      
      This will be used by Cell platforms using 4xx-type IOs in the Axon bridge
      and can be used by any embedded-type device as well.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7eebde70
    • B
      [POWERPC] Generic DCR infrastructure · 4c75a6f4
      Benjamin Herrenschmidt 提交于
      This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that
      can be used by drivers to transparently address either native DCRs or
      memory mapped DCRs. The implementation for memory mapped DCRs is done
      after the binding being currently worked on for SLOF and the Axon
      chipset. This patch enables it for the cell native platform
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4c75a6f4
    • B
      [POWERPC] Remove ppc_md.pci_map_irq & ppc_swizzle for ARCH=powerpc · 69108cf0
      Benjamin Herrenschmidt 提交于
      These were inherited from ARCH=ppc, but are not needed since parsing of interrupts
      should be done via the of_* functions (who can do swizzling). If we ever need to
      do non-standard swizzling on bridges without a device-node, then we might add
      back a slightly different version of ppc_md.pci_swizzle but for now, that is not
      the case.
      
      I removed the couple of calls for these in 83xx. If that breaks something, then
      there is a problem with the device-tree on these.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      69108cf0
    • B
      [POWERPC] Make pci_read_irq_line the default · f90bb153
      Benjamin Herrenschmidt 提交于
      This patch reworks the way IRQs are fixed up on PCI for arch powerpc.
      
      It makes pci_read_irq_line() called by default in the PCI code for
      devices that are probed, and add an optional per-device fixup in
      ppc_md for platforms that really need to correct what they obtain
      from pci_read_irq_line().
      
      It also removes ppc_md.irq_bus_setup which was only used by pSeries
      and should not be needed anymore.
      
      I've also removed the pSeries s7a workaround as it can't work with
      the current interrupt code anyway. I'm trying to get one of these
      machines working so I can test a proper fix for that problem.
      
      I also haven't updated the old-style fixup code from 85xx_cds.c
      because it's actually buggy :) It assigns pci_dev->irq hard coded
      numbers which is no good with the new IRQ mapping code. It should
      at least use irq_create_mapping(NULL, hard_coded_number); and possibly
      also set_irq_type() to set them as level low.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f90bb153
  2. 22 11月, 2006 1 次提交
  3. 13 11月, 2006 5 次提交
  4. 10 11月, 2006 1 次提交
    • J
      [POWERPC] pseries: Force 4k update_flash block and list sizes · ae883cab
      John Rose 提交于
      The enablement of 64k pages on pseries platforms exposed a bug in
      the RTAS mechanism for updating firmware.  RTAS assumes 4k for flash
      block and list sizes, and use of any other sizes results in a failure,
      even though PAPR does not specify any such requirement.
      
      This patch changes the rtas_flash module to force the use of 4k memory
      block and list sizes when preparing and sending a firmware image to
      RTAS.  The rtas_flash function now uses a slab cache of 4k blocks with
      4k alignment, rather than get_zeroed_page(), to allocate the memory for
      the flash blocks and lists.  The 4k alignment requirement is specified
      in PAPR.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ae883cab
  5. 02 11月, 2006 1 次提交
  6. 01 11月, 2006 4 次提交
    • B
      [POWERPC] Make alignment exception always check exception table · 4393c4f6
      Benjamin Herrenschmidt 提交于
      The alignment exception used to only check the exception table for
      -EFAULT, not for other errors. That opens an oops window if we can
      coerce the kernel into getting an alignment exception for other reasons
      in what would normally be a user-protected accessor, which can be done
      via some of the futex ops. This fixes it by always checking the
      exception tables.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4393c4f6
    • L
      [POWERPC] Use 4kB iommu pages even on 64kB-page systems · 5d2efba6
      Linas Vepstas 提交于
      The 10Gigabit ethernet device drivers appear to be able to chew
      up all 256MB of TCE mappings on pSeries systems, as evidenced by
      numerous error messages:
      
       iommu_alloc failed, tbl c0000000010d5c48 vaddr c0000000d875eff0 npages 1
      
      Some experimentation indicates that this is essentially because
      one 1500 byte ethernet MTU gets mapped as a 64K DMA region when
      the large 64K pages are enabled. Thus, it doesn't take much to
      exhaust all of the available DMA mappings for a high-speed card.
      
      This patch changes the iommu allocator to work with its own
      unique, distinct page size. Although the patch is long, its
      actually quite simple: it just #defines a distinct IOMMU_PAGE_SIZE
      and then uses this in all the places that matter.
      
      As a side effect, it also dramatically improves network performance
      on platforms with H-calls on iommu translation inserts/removes (since
      we no longer call it 16 times for a 1500 bytes packet when the iommu HW
      is still 4k).
      
      In the future, we might want to make the IOMMU_PAGE_SIZE a variable
      in the iommu_table instance, thus allowing support for different HW
      page sizes in the iommu itself.
      Signed-off-by: NLinas Vepstas <linas@austin.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Acked-by: NOlof Johansson <olof@lixom.net>
      Acked-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      5d2efba6
    • A
      [POWERPC] Fix oprofile support for e500 in arch/powerpc · dd6c89f6
      Andy Fleming 提交于
      Fixed a compile error in building the 85xx support with oprofile, and in
      the process cleaned up some issues with the fsl_booke performance monitor
      code.
      
      * Reorganized FSL Book-E performance monitoring code so that the 7450
        wouldn't be built if the e500 was, and cleaned it up so it was more
        self-contained.
      
      * Added a cpu_setup function for FSL Book-E.  The original
        cpu_setup function prototype had no arguments, assuming that
        the reg_setup function would copy the required information into
        variables which represented the registers.  This was silly for
        e500, since it has 1 register per counter (rather than 3 for
        all counters), so the code has been restructured to have
        cpu_setup take the current counter config array as an argument,
        with op_powerpc_setup() invoking op_powerpc_cpu_setup() through
        on_each_cpu(), and op_powerpc_cpu_setup() invoking the
        model-specific cpu_setup function with an argument.  The
        argument is ignored on all other platforms at present.
      
      * Fixed a confusing line where a trinary operator only had two
        arguments
      Signed-off-by: NAndrew Fleming <afleming@freescale.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dd6c89f6
    • B
      [POWERPC] Fix various offb issues · 441cbd8d
      Benjamin Herrenschmidt 提交于
      This patch fixes a few issues in offb:
      
       - A test was inverted causing the palette hack to never work
      (no device node was passed down to the init function)
      
       - Some cards seem to have their assigned-addresses property in a random
      order, thus we need to try using of_get_pci_address() first, which will
      fail if it's not a PCI device, and fallback to of_get_address() in that
      case. of_get_pci_address() properly parsees assigned-addresses to test
      the BAR number and thus will get it right whatever the order is.
      
       - Some cards (like GXT4500) provide a linebytes of 0xffffffff in the
      device-tree which does no good. This patch handles that by using the
      screen width when that happens. (Also fixes btext.c while at it).
      
       - Add detection of the GXT4500 in addition to the GXT2000 for the
      palette hacks (we use the same hack, palette is linear in register space
      at offset 0x6000).
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      441cbd8d
  7. 28 10月, 2006 1 次提交
  8. 26 10月, 2006 1 次提交
  9. 25 10月, 2006 9 次提交
  10. 24 10月, 2006 1 次提交
  11. 23 10月, 2006 2 次提交
    • J
      [POWERPC] Add 970GX cputable entry · 362ff7b2
      Jake Moilanen 提交于
      970GX cputable entry from Steve Winiecki.
      Signed-off-by: NJake Moilanen <moilanen@austin.ibm.com>
      
       arch/powerpc/kernel/cputable.c          |   15 +++++++++++++++
       arch/powerpc/oprofile/op_model_power4.c |    2 +-
       include/asm-powerpc/reg.h               |    1 +
       3 files changed, 17 insertions(+), 1 deletion(-)
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      362ff7b2
    • S
      [POWERPC] Simplify stolen time calculation · cbcdb93d
      Stephen Rothwell 提交于
      In calculating stolen time, we were trying to actually account for time
      spent in the hypervisor.  We don't really have enough information to do
      that accurately, so don't try.  Instead, we now calculate stolen time as
      time that the current cpu thread is not actually dispatching instructions.
      On chips without a PURR, we cannot do this, so stolen time will always
      be zero.  On chips with a PURR, this is merely the difference between
      the elapsed PURR values and the elapsed TB values.
      
      This gives us much more sane vaules from tools such as mpstat, even if
      they are still a bit strange e.g. 2 busy threads on one cpu will both
      appear to have 50% user time and 50% stolen time while 1 busy thread on
      a cpu will look like 100% user on one of them and 100% idle on the other.
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cbcdb93d
  12. 18 10月, 2006 1 次提交
    • P
      [POWERPC] Make sure interrupt enable gets restored properly · b0a779de
      Paul Mackerras 提交于
      The lazy IRQ disable patch missed a couple of places where the
      interrupt enable flags need to be restored correctly.  First, we
      weren't restoring the paca->hard_enabled flag on interrupt exit.
      Instead of saving it on entry, we compute it from the MSR_EE bit
      in the MSR we are restoring at exit.  Secondly, the MMU hash miss
      code was clearing both paca->soft_enabled and paca->hard_enabled
      but not restoring them in the case where hash_page was able to
      resolve the miss from the Linux page tables.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      b0a779de
  13. 16 10月, 2006 7 次提交
    • O
      [POWERPC] powerpc: Enable DEEPNAP power savings mode on 970MP · 5b43d20a
      Olof Johansson 提交于
      Without this patch, on an idle system I get:
      
      cpu-power-0:21.638
      cpu-power-1:27.102
      cpu-power-2:29.343
      cpu-power-3:25.784
      Total: 103.8W
      
      With this patch:
      
      cpu-power-0:11.730
      cpu-power-1:17.185
      cpu-power-2:18.547
      cpu-power-3:17.528
      Total: 65.0W
      
      If I lower HZ to 100, I can get it as low as:
      
      cpu-power-0:10.938
      cpu-power-1:16.021
      cpu-power-2:17.245
      cpu-power-3:16.145
      Total: 60.2W
      
      Another (older) Quad G5 went from 54W to 39W at HZ=250.
      
      Coming back out of Deep Nap takes 40-70 cycles longer than coming back
      from just Nap (which already takes quite a while). I don't think it'll
      be a performance issue (interrupt latency on an idle system), but in
      case someone does measurements feel free to report them.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Acked-by: NMichael Buesch <mb@bu3sch.de>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      5b43d20a
    • P
      [POWERPC] Lazy interrupt disabling for 64-bit machines · d04c56f7
      Paul Mackerras 提交于
      This implements a lazy strategy for disabling interrupts.  This means
      that local_irq_disable() et al. just clear the 'interrupts are
      enabled' flag in the paca.  If an interrupt comes along, the interrupt
      entry code notices that interrupts are supposed to be disabled, and
      clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
      flag in the paca, and returns.  This means that interrupts only
      actually get disabled in the processor when an interrupt comes along.
      
      When interrupts are enabled by local_irq_enable() et al., the code
      sets the interrupts-enabled flag in the paca, and then checks whether
      interrupts got hard-disabled.  If so, it also sets the EE bit in the
      MSR to hard-enable the interrupts.
      
      This has the potential to improve performance, and also makes it
      easier to make a kernel that can boot on iSeries and on other 64-bit
      machines, since this lazy-disable strategy is very similar to the
      soft-disable strategy that iSeries already uses.
      
      This version renames paca->proc_enabled to paca->soft_enabled, and
      changes a couple of soft-disables in the kexec code to hard-disables,
      which should fix the crash that Michael Ellerman saw.  This doesn't
      yet use a reserved CR field for the soft_enabled and hard_enabled
      flags.  This applies on top of Stephen Rothwell's patches to make it
      possible to build a combined iSeries/other kernel.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d04c56f7
    • A
      [POWERPC] Check for offline nodes in pci NUMA code · 284a9406
      Anton Blanchard 提交于
      During boot we bring up all memory and cpu nodes. Normally a PCI device
      will be in one of these online nodes, however in some weird setups it
      may not.
      
      We have only seen this in the lab but we may as well check for the case
      and fallback to -1 (all nodes).
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      284a9406
    • A
      [POWERPC] Better check in show_instructions · 00ae36de
      Anton Blanchard 提交于
      Instead of just checking that an address is in the right range, use the
      provided __kernel_text_address() helper which covers both the kernel and
      module text sections.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      00ae36de
    • A
      [POWERPC] POWER6 has 6 PMCs · 99f48610
      Anton Blanchard 提交于
      Change ->num_pmcs to match the number of PMCs in POWER6.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      99f48610
    • A
      [POWERPC] Never panic when taking altivec exceptions from userspace · 6c4841c2
      Anton Blanchard 提交于
      At the moment we rely on a cpu feature bit or a firmware property to
      detect altivec. If we dont have either of these and the cpu does in fact
      support altivec we can cause a panic from userspace.
      
      It seems safer to always send a signal if we manage to get an 0xf20
      exception from userspace.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      6c4841c2
    • R
      [POWERPC] Fix IO Window Updates on P2P bridges. · 60b2a46c
      Randy Vinson 提交于
      When update_bridge_base() updates the IO window on a PCI-to-PCI
      bridge, it fails to zero the upper 16 bits of the base and limit
      registers if the window size is less than 64K.  This fixes it.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      60b2a46c