- 04 12月, 2006 2 次提交
-
-
由 Kevin Corry 提交于
Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: NKevin Corry <kevcorry@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
由 Kevin Corry 提交于
More macros for manipulating bits in the Cell PMU control registers. Signed-off-by: NKevin Corry <kevcorry@us.ibm.com> Signed-off-by: NCarl Love <carll@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
- 25 10月, 2006 3 次提交
-
-
由 Kevin Corry 提交于
Add routines for accessing the registers and counters in the performance monitoring unit. Signed-off-by: NKevin Corry <kevcorry@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
由 Kevin Corry 提交于
Many of the registers in the performance monitoring unit are write-only. We need to save a "shadow" copy when we write to those registers so we can retrieve the values if we need them later. The new cbe_pmd_shadow_regs structure is added to the cbe_regs_map structure so we have the appropriate per-node copies of these shadow values. Signed-off-by: NKevin Corry <kevcorry@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
由 David Erb 提交于
There are a few definitions that are required by subsequent patches, so add them here. The original patch is from David Erb, but is significantly cleaned up by Kevon Corry. Cc: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
- 21 6月, 2006 1 次提交
-
-
由 Benjamin Herrenschmidt 提交于
This is a first version of support for the Cell BE "Reliability, Availability and Serviceability" features. It doesn't yet handle some of the RAS interrupts (the ones described in iic_is/iic_irr), I'm still working on a proper way to expose these. They are essentially a cascaded controller by themselves (sic !) though I may just handle them locally to the iic driver. I need also to sync with David Erb on the way he hooked in the performance monitor interrupt. So that's all for 2.6.17 and I'll do more work on that with my rework of the powerpc interrupt layer that I'm hacking on at the moment. Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-