1. 16 2月, 2012 1 次提交
    • B
      sfc: Add SR-IOV back-end support for SFC9000 family · cd2d5b52
      Ben Hutchings 提交于
      On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
      each with an RX queue, a TX queue, an event queue and a mailbox
      register.  These may be assigned to up to 127 SR-IOV virtual functions
      per port, with up to 64 VIs per VF.
      
      We allocate an extra channel (IRQ and event queue only) to receive
      requests from VF drivers.
      
      There is a per-port limit of 4 concurrent RX queue flushes, and queue
      flushes may be initiated by the MC in response to a Function Level
      Reset (FLR) of a VF.  Therefore, when SR-IOV is in use, we submit all
      flush requests via the MC.
      
      The RSS indirection table is shared with VFs, so the number of RX
      queues used in the PF is limited to the number of VIs per VF.
      
      This is almost entirely the work of Steve Hodgson, formerly
      shodgson@solarflare.com.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      cd2d5b52
  2. 27 1月, 2012 4 次提交
  3. 10 1月, 2012 2 次提交
  4. 11 8月, 2011 1 次提交
  5. 12 5月, 2011 1 次提交
    • B
      sfc: Always map MCDI shared memory as uncacheable · 747df225
      Ben Hutchings 提交于
      We enabled write-combining for memory-mapped registers in commit
      65f0b417, but inhibited it for the
      MCDI shared memory where this is not supported.  However,
      write-combining mappings also allow read-reordering, which may also
      be a problem.
      
      I found that when an SFC9000-family controller is connected to an
      Intel 3000 chipset, and write-combining is enabled, the controller
      stops responding to PCIe read requests during driver initialisation
      while the driver is polling for completion of an MCDI command.  This
      results in an NMI and system hang.  Adding read memory barriers
      between all reads to the shared memory area appears to reduce but not
      eliminate the probability of this.
      
      We have not yet established whether this is a bug in our BIU or in the
      PCIe bridge.  For now, work around by mapping the shared memory area
      separately.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      747df225
  6. 31 3月, 2011 1 次提交
  7. 05 3月, 2011 1 次提交
    • B
      sfc: Use write-combining to reduce TX latency · 65f0b417
      Ben Hutchings 提交于
      Based on work by Neil Turton <nturton@solarflare.com> and
      Kieran Mansley <kmansley@solarflare.com>.
      
      The BIU has now been verified to handle 3- and 4-dword writes within a
      single 128-bit register correctly.  This means we can enable write-
      combining and only insert write barriers between writes to distinct
      registers.
      
      This has been observed to save about 0.5 us when pushing a TX
      descriptor to an empty TX queue.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      65f0b417
  8. 01 3月, 2011 2 次提交
  9. 04 12月, 2010 2 次提交
    • S
      sfc: Fix event based MCDI completion and MC REBOOT/CMDDONE ordering issue · 18e3ee2c
      Steve Hodgson 提交于
      The mcfw *never* sends CMDDONE when rebooting. Changing this so that it always
      sends CMDDONE *before* REBOOT is easy on Siena, but it's not obvious that we
      could guarantee to be able to implement this on future hardware.
      
      Given this, I'm less convinced that the protocol should be changed.
      
      To reiterate the failure mode: The driver sees this:
      
       issue command
       receive REBOOT event
      
      Was that reboot event sent before the command was issued, or in
      response to the command? If the former then there will be a subsequent
      CMDDONE event, if the latter, then there will be no CMDDONE event.
      
      Options to resolve this are:
      
       1. REBOOT always completes an outstanding mcdi request, and we set
          the credits count to ignore a subsequent CMDDONE event with
          mismatching seqno.
      
       2. REBOOT never completes an outstanding mcdi request. If there is
          no CMDDONE event then we rely on the mcdi timeout code to complete
          the outstanding request, incurring a 10s delay.
      
      I'd argue that (2) is tidier, but that incurring a 10s delay is a little
      needless. Let's go with (1).
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      18e3ee2c
    • B
      sfc: Reduce log level for MCDI error response in efx_mcdi_rpc() · f18ca364
      Ben Hutchings 提交于
      Some errors are expected, e.g. when sending new commands to an MC
      running old firmware.  Only the caller of efx_mcdi_rpc() can decide
      what is a real error.  Therefore log the error responses with
      netif_dbg().
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f18ca364
  10. 21 10月, 2010 1 次提交
  11. 25 6月, 2010 1 次提交
  12. 29 4月, 2010 2 次提交
  13. 20 2月, 2010 1 次提交
  14. 04 2月, 2010 2 次提交
  15. 26 1月, 2010 1 次提交
  16. 14 1月, 2010 1 次提交
  17. 30 11月, 2009 1 次提交
    • B
      sfc: Add support for SFC9000 family (1) · afd4aea0
      Ben Hutchings 提交于
      This adds support for the SFC9000 family of 10G Ethernet controllers
      and LAN-on-motherboard chips, starting with the SFL9021 'Siena' and
      SFC9020 'Bethpage'.
      
      The SFC9000 family is based on the SFC4000 'Falcon' architecture, but
      with some significant changes:
      
      - Two ports are associated with two independent PCI functions
        (except SFC9010)
      - Integrated 10GBASE-T PHY(s) (SFL9021/9022)
      - MAC, PHY and board peripherals are managed by firmware
        - Driver does not require board-specific code
        - Firmware supports wake-on-LAN and lights-out management through NC-SI
      - IPv6 checksum offload and RSS
      - Filtering by MAC address and VLAN (not included in this code)
      - PCI SR-IOV (not included in this code)
      
      Credit for this code is largely due to my colleagues at Solarflare:
      
         Guido Barzini
         Steve Hodgson
         Kieran Mansley
         Matthew Slattery
         Neil Turton
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      afd4aea0