1. 29 10月, 2005 9 次提交
  2. 26 10月, 2005 1 次提交
  3. 24 10月, 2005 1 次提交
    • L
      cardbus: limit IO windows to 256 bytes · 4196c3af
      Linus Torvalds 提交于
      That's what we've always historically done, and bigger windows seem to
      confuse some cardbus bridges. Or something.
      
      Alan reports that this makes the ThinkPad 600x series work properly
      again: the 4kB IO window for some reason made IDE DMA not work, which
      makes IDE painfully slow even if it works after DMA timeouts.
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      4196c3af
  4. 18 10月, 2005 2 次提交
  5. 23 9月, 2005 1 次提交
    • I
      [PATCH] pci: fixup parent subordinate busnr · 12f44f46
      Ivan Kokshaysky 提交于
      I believe the change that broke things is introduction of
      pci_fixup_parent_subordinate_busnr().
      
      The patch here does two things:
      - hunk #1 should fix the problems you've seen when you boot without
        additional "pci" kernel options;
      - hunk #2 supposedly fixes boot with "pci=assign-busses" option which
        otherwise hangs Acer TM81xx machines as reported.
      
      Please try this with and without "pci=assign-busses". If it boots,
      I'd like to see 'lspci -vvx' for both cases.
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      12f44f46
  6. 22 9月, 2005 4 次提交
  7. 18 9月, 2005 3 次提交
  8. 15 9月, 2005 1 次提交
  9. 11 9月, 2005 1 次提交
  10. 10 9月, 2005 6 次提交
  11. 09 9月, 2005 11 次提交
    • P
      [PATCH] Separate pci bits out of struct device_node · 1635317f
      Paul Mackerras 提交于
      This patch pulls the PCI-related junk out of struct device_node and
      puts it in a separate structure, struct pci_dn.  The device_node now
      just has a void * pointer in it, which points to a struct pci_dn for
      nodes that represent PCI devices.  It could potentially be used in
      future for device-specific data for other sorts of devices, such as
      virtual I/O devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1635317f
    • B
      [PATCH] PCI/libata INTx cleanup · a04ce0ff
      Brett M Russ 提交于
      Simple cleanup to eliminate X copies of the pci_enable_intx() function
      in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
      libata and msi.c.
      Signed-off-by: NBrett Russ <russb@emc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a04ce0ff
    • D
      [PATCH] PCI: Support PCM PM CAP version 3 · 3fe9d19f
      Daniel Ritz 提交于
      - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
      
      - pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
        PCI_UNKNOWN
      
      - minor cleanups
      Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3fe9d19f
    • P
      [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive) · cecf4864
      Paul Mackerras 提交于
      The PCI error recovery infrastructure needs to be able to contact all
      the drivers affected by a PCI error event, which may mean traversing
      all the devices under a given PCI-PCI bridge.  This patch adds a
      function to the PCI core that traverses all the PCI devices on a PCI
      bus and under any PCI-PCI bridges on that bus (and so on), calling a
      given function for each device.  This provides a way for the error
      recovery code to iterate through all devices that are affected by an
      error event.
      
      This version is not implemented as a recursive function.  Instead,
      when we reach a PCI-PCI bridge, we set the pointers to start doing the
      devices on the bus under the bridge, and when we reach the end of a
      bus's devices, we use the bus->self pointer to go back up to the next
      higher bus and continue doing its devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cecf4864
    • P
      [PATCH] PCI Hotplug: SGI hotplug driver fixes · 1d2450a4
      Prarit Bhargava 提交于
      These fixes were suggested by pcihpd-discuss, but were dropped in the
      initial checkin of the code.  These fixes include cleaning up the
      hotplug driver sysfs filename, and some minor code cleanups.  The driver
      also requires at least PROM 4.30, not 4.20.
      Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1d2450a4
    • A
      [PATCH] PCI: Fix regression in pci_enable_device_bars · 11f3859b
      Alan Stern 提交于
      This patch (as552) fixes yet another small problem recently added.  If an
      attempt to put a PCI device back into D0 fails because the device doesn't
      support PCI PM, it shouldn't count as error.  Without this patch the UHCI
      controllers on my Intel motherboard don't work.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      11f3859b
    • G
    • D
      [PATCH] Make sparc64 use setup-res.c · 085ae41f
      David S. Miller 提交于
      There were three changes necessary in order to allow
      sparc64 to use setup-res.c:
      
      1) Sparc64 roots the PCI I/O and MEM address space using
         parent resources contained in the PCI controller structure.
         I'm actually surprised no other platforms do this, especially
         ones like Alpha and PPC{,64}.  These resources get linked into the
         iomem/ioport tree when PCI controllers are probed.
      
         So the hierarchy looks like this:
      
         iomem --|
      	   PCI controller 1 MEM space --|
      				        device 1
      					device 2
      					etc.
      	   PCI controller 2 MEM space --|
      				        ...
         ioport --|
                  PCI controller 1 IO space --|
      					...
                  PCI controller 2 IO space --|
      					...
      
         You get the idea.  The drivers/pci/setup-res.c code allocates
         using plain iomem_space and ioport_space as the root, so that
         wouldn't work with the above setup.
      
         So I added a pcibios_select_root() that is used to handle this.
         It uses the PCI controller struct's io_space and mem_space on
         sparc64, and io{port,mem}_resource on every other platform to
         keep current behavior.
      
      2) quirk_io_region() is buggy.  It takes in raw BUS view addresses
         and tries to use them as a PCI resource.
      
         pci_claim_resource() expects the resource to be fully formed when
         it gets called.  The sparc64 implementation would do the translation
         but that's absolutely wrong, because if the same resource gets
         released then re-claimed we'll adjust things twice.
      
         So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
         conversion before passing it on to pci_claim_resource().
      
      3) I was mistakedly __init'ing the function methods the PCI controller
         drivers provide on sparc64 to implement some parts of these
         routines.  This was, of course, easy to fix.
      
      So we end up with the following, and that nasty SPARC64 makefile
      ifdef in drivers/pci/Makefile is finally zapped.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      085ae41f
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · 064b53db
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      064b53db
    • K
      [PATCH] PCI Hotplug: use bus_slot number for name · 1248d636
      Kristen Accardi 提交于
      For systems with multiple hotplug controllers, you need to use more than
      just the slot number to uniquely name the slot.  Without a unique slot
      name, the pci_hp_register() will fail.  This patch adds the bus number
      to the name.
      Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1248d636
    • A
      [PATCH] PCI: remove CONFIG_PCI_NAMES · 982245f0
      Adrian Bunk 提交于
      This patch removes CONFIG_PCI_NAMES.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      982245f0