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  1. 25 1月, 2017 1 次提交
    • D
      misc: sram: Integrate protect-exec reserved sram area type · 37afff0d
      由 Dave Gerlach 提交于 
      Introduce a new "protect-exec" reserved sram area type which is
makes use of the the existing functionality provided for the "pool"
sram region type for use with the genalloc framework and with the
added requirement that it be maintained as read-only and executable
while allowing for an arbitrary number of drivers to share the space.

This introduces a common way to maintain a region of sram as read-only
and executable and also introduces a helper function, sram_exec_copy,
which allows for copying data to this protected region while maintaining
locking to avoid conflicts between multiple users of the same space. A
region of memory that is marked with the "protect-exec" flag in the
device tree also has the requirement of providing a page aligned block
of memory so that the page attribute manipulation does not affect
surrounding regions.

Also, selectively enable this only for builds that support set_memory_*
calls, for now just ARM, through the use of Kconfig.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      37afff0d
  3. 31 8月, 2016 1 次提交
  5. 15 8月, 2016 1 次提交
  7. 02 8月, 2016 1 次提交
  9. 08 7月, 2016 4 次提交
  11. 11 6月, 2016 2 次提交
  13. 04 2月, 2016 1 次提交
  15. 30 7月, 2015 1 次提交
  17. 25 5月, 2015 1 次提交
  19. 08 10月, 2014 1 次提交
    • I
      cxl: Add base builtin support · 10542ca0
      由 Ian Munsie 提交于 
      This adds the base cxl support that cannot be built as a module. Specifically
it adds the cxl callbacks that are called from the core powerpc mm code which
must always exist irrespective of if the cxl module is loaded or not. This is
similar to how cell works with CONFIG_SPU_BASE.

This adds a cxl_slbia() call (similar to spu_flush_all_slbs()) which checks if
the cxl module is loaded and in use, returning immediately if it is not. If it
is in use it calls into the cxl SLB invalidation code.
Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
Signed-off-by: NMichael Neuling <mikey@neuling.org>
Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      10542ca0
  21. 09 7月, 2014 1 次提交
  23. 16 5月, 2014 1 次提交
    • P
      mfd: vexpress: Define the device as MFD cells · 974cc7b9
      由 Pawel Moll 提交于 
      This patch - finally, after over 6 months! :-( - addresses
Samuel's request to split the vexpress-sysreg driver into
smaller portions and define the device in a form of MFD
cells:

* LEDs code has been completely removed and replaced with
  "gpio-leds" nodes in the tree (referencing dedicated
  GPIO subnodes in sysreg - bindings documentation updated);
  this also better fits the reality as some variants of the
  motherboard don't have all the LEDs populated

* syscfg bridge code has been extracted into a separate
  driver (placed in drivers/misc for no better place)

* all the ID & MISC registers are defined as sysconf
  making them available for other drivers should they need
  to use them (and also to the user via /sys/kernel/debug/regmap
  which can be helpful in platform debugging)
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
      974cc7b9
  25. 01 3月, 2014 1 次提交
  27. 19 12月, 2013 1 次提交
  29. 17 10月, 2013 1 次提交
  31. 27 9月, 2013 1 次提交
  33. 30 4月, 2013 1 次提交
    • P
      misc: generic on-chip SRAM allocation driver · 4984c6f5
      由 Philipp Zabel 提交于 
      This driver requests and remaps a memory region as configured in the
device tree.  It serves memory from this region via the genalloc API.  It
optionally enables the SRAM clock.

Other drivers can retrieve the genalloc pool from a phandle pointing to
this drivers' device node in the device tree.

The allocation granularity is hard-coded to 32 bytes for now, to make the
SRAM driver useful for the 6502 remoteproc driver.  There is overhead for
bigger SRAMs, where only a much coarser allocation granularity is needed:
At 32 bytes minimum allocation size, a 256 KiB SRAM needs a 1 KiB bitmap
to track allocations.

[akpm@linux-foundation.org: fix Kconfig text, make sram_init static]
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Tested-by: NMichal Simek <monstr@monstr.eu>
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Huang Shijie <shijie8@gmail.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Matt Porter <mporter@ti.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      4984c6f5
  35. 26 3月, 2013 1 次提交
  37. 16 3月, 2013 1 次提交
  39. 18 1月, 2013 1 次提交
  41. 09 1月, 2013 1 次提交
  43. 20 9月, 2012 1 次提交
  45. 12 7月, 2012 1 次提交
  47. 10 5月, 2012 1 次提交
  49. 02 5月, 2012 1 次提交
  51. 19 4月, 2012 1 次提交
  53. 09 1月, 2012 1 次提交
  55. 24 9月, 2011 1 次提交
  57. 26 7月, 2011 1 次提交
  59. 02 7月, 2011 1 次提交
  61. 19 5月, 2011 1 次提交
    • I
      misc: Add CARMA DATA-FPGA Access Driver · c186f0e1
      由 Ira Snyder 提交于 
      This driver allows userspace to access the data processing FPGAs on the
OVRO CARMA board. It has two modes of operation:

1) random access

This allows users to poke any DATA-FPGA registers by using mmap to map
the address region directly into their memory map.

2) correlation dumping

When correlating, the DATA-FPGA's have special requirements for getting
the data out of their memory before the next correlation. This nominally
happens at 64Hz (every 15.625ms). If the data is not dumped before the
next correlation, data is lost.

The data dumping driver handles buffering up to 1 second worth of
correlation data from the FPGAs. This lowers the realtime scheduling
requirements for the userspace process reading the device.
Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c186f0e1
  63. 14 5月, 2011 1 次提交
    • J
      Intel PTI implementaiton of MIPI 1149.7. · 0b61d2ac
      由 J Freyensee 提交于 
      The PTI (Parallel Trace Interface) driver directs
trace data routed from various parts in the system out
through an Intel Penwell PTI port and out of the mobile
device for analysis with a debugging tool (Lauterbach or Fido).
Though n_tracesink and n_tracerouter line discipline drivers
are used to extract modem tracing data to the PTI driver
and other parts of an Intel mobile solution, the PTI driver
can be used independent of n_tracesink and n_tracerouter.

You should select this driver if the target kernel is meant for
an Intel Atom (non-netbook) mobile device containing a MIPI
P1149.7 standard implementation.
Signed-off-by: NJ Freyensee <james_p_freyensee@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0b61d2ac
  65. 23 3月, 2011 1 次提交
  67. 22 3月, 2011 1 次提交
  69. 29 10月, 2010 1 次提交
  71. 27 10月, 2010 1 次提交