1. 30 6月, 2012 1 次提交
    • V
      ARM: OMAP3+: clock33xx: Add AM33XX clock tree data · e30384ab
      Vaibhav Hiremath 提交于
      AM33XX clock implementation is different than any existing OMAP
      family of devices. Although DPLL module is similar to OMAP4
      device, but the usage is very much different than OMAP4.
      AM33XX has different peripheral set and each module gets
      integrated to the clock framework differently than OMAP
      family of devices.
      
      This patch adds full Clock tree data for AM33XX family
      of devices and also integrates it into existing OMAP framework.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      CC: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: updated to apply; changed 'soc_is_am33xx' to
       'cpu_is_am33xx' to match usage in Tony's current am33xx branch]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e30384ab
  2. 08 5月, 2012 1 次提交
  3. 09 12月, 2011 1 次提交
    • J
      ARM: OMAP1: Move dpll1 rates selection from config to runtime · 24ce2705
      Janusz Krzysztofik 提交于
      For still better multi-OMAP1 support, expand omap1_rate_table with flags
      for different SoC types and match them while selecting clock rates. The
      idea is stolen from current omap24xx clock rate selection algorithm.
      
      Since clkdev platform flag definitions are reused here, those had to be
      expanded with one extra entry for OMAP1710 subtype, as this is the only
      SoC for which we allow selection of the highest, 216 MHz rate.
      
      Once done, remove no longer needed clock rate configure time options.
      
      Tested on Amstrad Delta.
      Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
      [tony@atomide.com: updated comments]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      24ce2705
  4. 08 7月, 2011 1 次提交
  5. 17 2月, 2011 1 次提交
  6. 22 12月, 2010 1 次提交
    • P
      OMAP3: clock: clarify usage of struct clksel_rate.flags and struct omap_clk.cpu · 553d239a
      Paul Walmsley 提交于
      Clarify the usage of the struct omap_clk.cpu flags (e.g., CK_*) to use
      bits only for individual SoC variants (e.g., CK_3430ES1, CK_3505,
      etc.).  Superset flags, such as CK_3XXX or CK_AM35XX, are now defined
      as disjunctions of individual SoC variant flags.  This simplifies the
      definition and use of these flags.  struct omap_clk record definitions
      can now simply specify the bitmask of actual SoCs that the records are
      valid for.  The clock init code can simply set a single CPU type mask
      bit for the SoC that is currently in use, and test against that,
      rather than needing to set some combination of flags.
      
      Similarly, clarify the use of struct clksel_rate.flags.  The bit
      allocated for RATE_IN_3XXX has been reassigned, and RATE_IN_3XXX has
      been defined as a disjunction of the 34xx and 36xx rate flags.  The
      advantages are the same as the above.
      
      Clarify the usage of struct omap_clk.cpu flags such as CK_34XX to only
      apply to the SoCs that they name, e.g., OMAP34xx chips.  The previous
      practice caused significantly different SoCs, such as OMAP36xx, to be
      included in CK_34XX.  In my opinion, this is much more intuitive.
      
      Similarly, clarify the use of struct clksel_rate.flags, such that
      RATE_IN_3430ES2PLUS now only applies to 34xx chips with ES level >= 2
      - it does not apply to OMAP36xx.
      
      ...
      
      At some point, it probably makes sense to collapse the CK_* and
      RATE_IN_* flags together into a single bitfield, and possibly use the
      existing CHIP_IS_OMAP* flags for platform detection.
      
      ...
      
      This all seems to work fine on OMAP34xx and OMAP36xx Beagle.  Not sure
      if it works on Sitara or the TI816X, unfortunately I don't have any
      here to test with.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      553d239a
  7. 26 11月, 2010 1 次提交
  8. 27 1月, 2010 1 次提交
    • P
      OMAP3 clock: reorganize CK_* platform flags · 2c8a177e
      Paul Walmsley 提交于
      Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and
      the OMAP34xx die shrink, OMAP36xx/OMAP37xx.  Introduce a new CK_*
      flag, CK_3XXX, that marks all clocks that are common to OMAP3 family
      chips.  CK_343X now refers to clocks that are available only on
      OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version).
      At some point, the RATE_IN_* flags should be updated also.
      
      While here, add some documentation describing the chip families
      covered by these clock flags.
      
      This patch is partially based on patches from Ranjith Lohithakshan
      <ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Ranjith Lohithakshan <ranjithl@ti.com>
      Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
      2c8a177e
  9. 12 12月, 2009 3 次提交