- 14 2月, 2011 1 次提交
-
-
由 Anatolij Gustschin 提交于
Currently when two or more buffers are queued by the camera driver and so the double buffering is enabled in the idmac, we lose one frame comming from CSI since the reporting of arrival of the first frame is deferred by the DMAIC_7_EOF interrupt handler and reporting of the arrival of the last frame is not done at all. So when requesting N frames from the image sensor we actually receive N - 1 frames in user space. The reason for this behaviour is that the DMAIC_7_EOF interrupt handler misleadingly assumes that the CUR_BUF flag is pointing to the buffer used by the IDMAC. Actually it is not the case since the CUR_BUF flag will be flipped by the FSU when the FSU is sending the <TASK>_NEW_FRM_RDY signal when new frame data is delivered by the CSI. When sending this singal, FSU updates the DMA_CUR_BUF and the DMA_BUFx_RDY flags: the DMA_CUR_BUF is flipped, the DMA_BUFx_RDY is cleared, indicating that the frame data is beeing written by the IDMAC to the pointed buffer. DMA_BUFx_RDY is supposed to be set to the ready state again by the MCU, when it has handled the received data. DMAIC_7_CUR_BUF flag won't be flipped here by the IPU, so waiting for this event in the EOF interrupt handler is wrong. Actually there is no spurious interrupt as described in the comments, this is the valid DMAIC_7_EOF interrupt indicating reception of the frame from CSI. The patch removes code that waits for flipping of the DMAIC_7_CUR_BUF flag in the DMAIC_7_EOF interrupt handler. As the comment in the current code denotes, this waiting doesn't help anyway. As a result of this removal the reporting of the first arrived frame is not deferred to the time of arrival of the next frame and the drivers software flag 'ichan->active_buffer' is in sync with DMAIC_7_CUR_BUF flag, so the reception of all requested frames works. This has been verified on the hardware which is triggering the image sensor by the programmable state machine, allowing to obtain exact number of frames. On this hardware we do not tolerate losing frames. This patch also removes resetting the DMA_BUFx_RDY flags of all channels in ipu_disable_channel() since transfers on other DMA channels might be triggered by other running tasks and the buffers should always be ready for data sending or reception. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Reviewed-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 31 1月, 2011 16 次提交
-
-
由 Shawn Guo 提交于
As per the reference manual, bit "L" should be set while bit "C" should be cleared for the last buffer descriptor in the non-cyclic chain, so that sdma can stop trying to find the next BD and end the transfer. In case of sdma_prep_slave_sg(), BD_LAST needs to be set and BD_CONT be cleared for the last BD. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
sdma_handle_channel_loop() is the handler of cyclic tx. One period success does not really mean the success of the tx. Instead of DMA_SUCCESS, DMA_IN_PROGRESS should be the one to tell. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
The sdmac->status was designed to reflect the status of the tx, so simply return it in sdma_tx_status(). Then dma client can call dma_async_is_tx_complete() to know the status of the tx. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
sdma_prep_dma_cyclic() sets sdmac->status to DMA_ERROR in err_out, and sdma_prep_slave_sg() needs to do the same. Otherwise, sdmac->status stays at DMA_IN_PROGRESS, which will make the function return immediately next time it gets called. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
This is a leftover from the time that the driver did not have sdma_prep_dma_cyclic callback and implemented sound dma as a looped sg chain. And it can be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
The capabilities are device specific fields, not channel specific fields. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
We need channel 0 of the sdma engine for internal purposes. We accomplished this by calling dma_request_channel() in the probe function. This does not work when multiple dma engines are present which is the case when IPU support for i.MX31/35 is compiled in. So instead of registering channel 0 and reserving it afterwards simply do not register it in the first place. With this the dmaengine channel counting does not match sdma channel counting anymore, so we have to use sdma channel counting in the driver. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
The capabilities are device specific fields, not channel specific fields. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
This is bogus as the dmaengine core will overwrite this field. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
This patch lets sdma_prep_slave_sg fail if the entries of an sg list do not start on multiples of the word size or if the lengths are not multiple of the word size. Also, catch the previously unhandled DMA_SLAVE_BUSWIDTH_8_BYTES and DMA_SLAVE_BUSWIDTH_UNDEFINED cases. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Russell King - ARM Linux 提交于
If a transfer is initiated from memory to a peripheral, then data is fetched and the channel is marked busy. This busy status persists until the HALT bit is set and the queued data has been transfered to the peripheral. Waiting indefinitely after setting the HALT bit results in system lockups. Timeout this operation, and print an error when this happens. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
If we try to pause a channel when terminating a transfer, we could end up spinning for it to become inactive indefinitely, and can result in an uninterruptible wait requiring a reset to recover from. Terminating a transfer is supposed to take effect immediately, but may result in data loss. To make this clear, rename the function to pl08x_terminate_phy_chan(). Also, make sure it is always consistently called - with the spinlock held and IRQs disabled, and ensure that the TC and ERR interrupt status is always cleared. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 30 1月, 2011 3 次提交
-
-
由 Shawn Guo 提交于
Variable name sdma and sdmac are consistently used as the pointer to sdma_engine and sdma_channel respectively throughout the file. The patch fixes the inconsistency seen in function sdma_assign_cookie(). Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Sascha Hauer 提交于
When loading the microcode to the SDMA engine we have to use the ram_code_start_addr found in the firmware image. The copy in the sdma engine is not initialized correctly. This is broken since: 5b28aa31 dmaengine i.MX SDMA: Allow to run without firmware Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 17 1月, 2011 1 次提交
-
-
由 Russell King - ARM Linux 提交于
Cleanup the formatting of comments, remove some which don't make sense anymore. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> [fix conflict with 96a608a4] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 15 1月, 2011 8 次提交
-
-
由 Wei Yongquan 提交于
Commit f5e70d0f renamed MD_RAID6_PQ to RAID6_PQ, but iop-adma.c didn't update synchronously. Signed-off-by: NWei Yongquan <weiyqlq@gmail.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Nicolas Ferre 提交于
We were reading channel status then taking a lock. This lead to a race because this lock may delay us and then make this channel not idle anymore. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Nicolas Ferre 提交于
Place flags on first descriptor of chain instead of last. This is the one used by atc_chain_complete() function while unmapping. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Eric Xu 提交于
Use subsys_initcall instead of module_init in order to keep DMA engine rolling before other peripheral drivers. Signed-off-by: NEric Xu <hong.xu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Nicolas Ferre 提交于
Following descriptor flow in at_hdmac driver, descriptor comming from atc_desc_get() as already DMA_CTRL_ACK flag set. No need to set it again. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Nicolas Ferre 提交于
In atc_prep_slave_sg() function we use dma_address field of scatterlist with sg_dma_address() macro instead of sg_phys(). DMA address is already computed by dma_map_sg() or another mapping function in calling driver. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Tomoya MORINAGA 提交于
Support new device OKI SEMICONDUCTOR's ML7213 IOH(Input/Output Hub) which is for IVI(In-Vehicle Infotainment) use. The ML7213 is companion chip for Intel Atom E6xx series. The ML7213 is completely compatible for Intel EG20T PCH. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 07 1月, 2011 1 次提交
-
-
由 Guennadi Liakhovetski 提交于
A recent patch has added a die notifier to the shdma driver, however, it registers a static die-notifier object in the probe routine, i.e., for each device instance. This is wrong and leads to a system lockup. This patch moves the die notifier registration to module init and exit routines respectively. Reported-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 05 1月, 2011 10 次提交
-
-
由 Russell King - ARM Linux 提交于
Prevent dma_set_runtime_config() being used to alter the configuration supplied by the platform for memcpy channel configuration. No one should be trying to change this configuration. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
There are cases in dma_set_runtime_config() where we fail to perform the requested action - and we just issue a KERN_ERR message in that case. We have the facility to return an error to the caller, so that is what we should do. When we encounter an error due to invalid parameters, we should not modify driver state. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
The PL08x driver holds on to the channel lock with interrupts disabled between the prepare and the subsequent submit API functions. This means that the locking state when the prepare function returns is dependent on whether it suceeeds or not. It did this to ensure that the physical channel wasn't released, and as it used to add the descriptor onto the pending list at prepare time rather than submit time. Now that we have reorganized the code to remove those reasons, we can now safely release the spinlock at the end of preparation and reacquire it in our submit function. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
Introduce 'phychan_hold' to hold on to physical DMA channels while we're preparing a new descriptor for it. This will be incremented when we allocate a physical channel and set the MUX registers during the preparation of the TXD, and will only be decremented when the TXD is submitted. This prevents the physical channel being given up before the new TXD is placed on the queue. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
Don't place TXDs on the pending list when they're prepared - place them on the list when they're ready to be submitted. Also, only place memcpy requests in the wait state when they're submitted and don't have a physical channel associated. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
This 'desc_list' is actually a list of pending descriptors, so name it after its function (pending list) rather than what it contains (descriptors). Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
The DMA engine API requires DMA engine implementations to unmap buffers passed into the non-slave DMA methods unless the relevant completion flag is set. We aren't doing this, so implement this facility. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
Like other DMA engine drivers do, store the passed flags into the async_tx structure, so they can be checked when the operation completes. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
We only need to store the dma address. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
Don't alter any txd->srcbus or txd->dstbus values while building the LLI list. This allows us to see the original dma_addr_t values passed in via the prep_memcpy() method. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-