1. 07 12月, 2007 1 次提交
    • H
      [AVR32] Follow the rules when dealing with the OCD system · 2507bc13
      Haavard Skinnemoen 提交于
      The current debug trap handling code does a number of things that are
      illegal according to the AVR32 Architecture manual. Most importantly,
      it may try to schedule from Debug Mode, thus clearing the D bit, which
      can lead to "undefined behaviour".
      
      It seems like this works in most cases, but several people have
      observed somewhat unstable behaviour when debugging programs,
      including soft lockups. So there's definitely something which is not
      right with the existing code.
      
      The new code will never schedule from Debug mode, it will always exit
      Debug mode with a "retd" instruction, and if something not running in
      Debug mode needs to do something debug-related (like doing a single
      step), it will enter debug mode through a "breakpoint" instruction.
      The monitor code will then return directly to user space, bypassing
      its own saved registers if necessary (since we don't actually care
      about the trapped context, only the one that came before.)
      
      This adds three instructions to the common exception handling code,
      including one branch. It does not touch super-hot paths like the TLB
      miss handler.
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      2507bc13
  2. 26 9月, 2006 1 次提交