1. 17 4月, 2008 6 次提交
  2. 08 2月, 2008 1 次提交
    • B
      Introduce flags for reserve_bootmem() · 72a7fe39
      Bernhard Walle 提交于
      This patchset adds a flags variable to reserve_bootmem() and uses the
      BOOTMEM_EXCLUSIVE flag in crashkernel reservation code to detect collisions
      between crashkernel area and already used memory.
      
      This patch:
      
      Change the reserve_bootmem() function to accept a new flag BOOTMEM_EXCLUSIVE.
      If that flag is set, the function returns with -EBUSY if the memory already
      has been reserved in the past.  This is to avoid conflicts.
      
      Because that code runs before SMP initialisation, there's no race condition
      inside reserve_bootmem_core().
      
      [akpm@linux-foundation.org: coding-style fixes]
      [akpm@linux-foundation.org: fix powerpc build]
      Signed-off-by: NBernhard Walle <bwalle@suse.de>
      Cc: <linux-arch@vger.kernel.org>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Vivek Goyal <vgoyal@in.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      72a7fe39
  3. 30 1月, 2008 5 次提交
    • S
      x86: fix section mismatch warning in acpi/boot.c · 87d7e980
      Sam Ravnborg 提交于
      Fix following warning:
      WARNING: arch/x86/kernel/built-in.o(.text+0x10ea0): Section mismatch: reference to .cpuinit.data:num_processors in 'acpi_unmap_lsapic'
      
      The exported function acpi_unmap_lsapic() references
      the variable num_processors that is annotated __cpuinitdata.
      
      Remove the annotation of num_processors as we never know
      when an exported function are called.
      And drop the needless initialsation to 0.
      
      Warning was seen on 64 bit but similar pattern were seen
      in 32 bit - so fix it up there too.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      87d7e980
    • I
      x86: smp_scan_config() debugging printouts · e91a3b43
      Ingo Molnar 提交于
      These are useful in figuring out early-mapping problems.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      e91a3b43
    • J
      arch/x86/: spelling fixes · ab4a574e
      Joe Perches 提交于
      Spelling fixes.
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      ab4a574e
    • L
      x86: 32-bit IOAPIC: de-fang IRQ compression · 2ba7deef
      Len Brown 提交于
      commit c434b7a6
      (x86: avoid wasting IRQs for PCI devices)
      created a concept of "IRQ compression" on i386
      to conserve IRQ numbers on systems with many
      sparsely populated IO APICs.
      
      The same scheme was also added to x86_64,
      but later removed when x86_64 recieved an IRQ over-haul
      that made it unnecessary -- including per-CPU
      IRQ vectors that greatly increased the IRQ capacity
      on the machine.
      
      i386 has not received the analogous over-haul,
      and thus a previous attempt to delete IRQ compression
      from i386 was rejected on the theory that there may
      exist machines that actually need it.  The fact is
      that the author of IRQ compression patch was unable
      to confirm the actual existence of such a system.
      
      As a result, all i386 kernels with IOAPIC support
      pay the following:
      
      1. confusion
      
      IRQ compression re-names the traditional IOAPIC
      pin numbers (aka ACPI GSI's) into sequential IRQ #s:
      
      ACPI: PCI Interrupt 0000:00:1c.0[A] -> GSI 20 (level, low) -> IRQ 16
      ACPI: PCI Interrupt 0000:00:1c.1[B] -> GSI 21 (level, low) -> IRQ 17
      ACPI: PCI Interrupt 0000:00:1c.2[C] -> GSI 22 (level, low) -> IRQ 18
      ACPI: PCI Interrupt 0000:00:1c.3[D] -> GSI 23 (level, low) -> IRQ 19
      ACPI: PCI Interrupt 0000:00:1c.4[A] -> GSI 20 (level, low) -> IRQ 16
      
      This makes /proc/interrupts look different
      depending on system configuration and device probe order.
      It is also different than the x86_64 kernel running
      on the exact same system.  As a result, programmers
      get confused when comparing systems.
      
      2. complexity
      
      The IRQ code in Linux is already overly complex,
      and IRQ compression makes it worse.  There have
      already been two bug workarounds related to IRQ
      compression -- the IRQ0 timer workaround and
      the VIA PCI IRQ workaround.
      
      3. size
      
      All i386 kernels with IOAPIC support contain an int[4096] --
      a 4 page array to contain the renamed IRQs.
      
      So while the irq compression code on i386 should really
      be deleted -- even before merging the x86_64 irq-overhaul,
      this patch simply disables it on all high volume systems
      to avoid problems #1 and #2 on most all i386 systems.
      
      A large system with pin numbers >=64 will still have compression
      to conserve limited IRQ numbers for sparse IOAPICS.  However,
      the vast majority of the planet, those with only pin numbers < 64
      will use an identity GSI -> IRQ mapping.
      Signed-off-by: NLen Brown <len.brown@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Acked-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      2ba7deef
    • T
      x86: cleanup mpspec variants · 64883ab0
      Thomas Gleixner 提交于
      Bring the mpspec variants into sync to prepare merging and
      paravirt support.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      64883ab0
  4. 20 10月, 2007 1 次提交
  5. 11 10月, 2007 2 次提交
  6. 09 5月, 2007 1 次提交
  7. 03 5月, 2007 1 次提交
  8. 03 2月, 2007 1 次提交
  9. 11 1月, 2007 1 次提交
    • V
      [PATCH] i386: cpu hotplug/smpboot misc MODPOST warning fixes · 4a5d107a
      Vivek Goyal 提交于
      o Misc smpboot/cpu hotplug path cleanups. I did those to supress the
        warnings generated by MODPOST. These warnings are visible only
        if CONFIG_RELOCATABLE=y.
      
      o CONFIG_RELOCATABLE compiles the kernel with --emit-relocs option. This
        option retains relocation information in vmlinux file and MODPOST
        is quick to spit out "Section mismatch" warnings.
      
      o This patch fixes some of those warnings. Many of the functions in
        smpboot case are __devinit type and they in turn accesses text/data which
        if of type __cpuinit. Now if CONFIG_HOTPLUG=y and CONFIG_HOTPLUG_CPU=n
        then we end up in cases where a function in .text segment is calling
        another function in .init.text segment and MODPOST emits warning.
      
      WARNING: vmlinux - Section mismatch: reference to .init.text:identify_cpu from .text between 'smp_store_cpu_info' (at offset 0xc011020d) and 'do_boot_cpu'
      WARNING: vmlinux - Section mismatch: reference to .init.text:init_gdt from .text between 'do_boot_cpu' (at offset 0xc01102ca) and '__cpu_up'
      WARNING: vmlinux - Section mismatch: reference to .init.text:print_cpu_info from .text between 'do_boot_cpu' (at offset 0xc01105d0) and '__cpu_up'
      
      o It also fixes the issues where CONFIG_HOTPLUG_CPU=y and start_secondary()
        is calling smp_callin() which in-turn calls synchronize_tsc_ap() which is
        of type __init. This should have meant broken CPU hotplug.
      
      WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'start_secondary' (at offset 0xc011603f) and 'initialize_secondary'
      WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'MP_processor_info' (at offset 0xc0116a4f) and 'mp_register_lapic'
      WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'MP_processor_info' (at offset 0xc0116a4f) and 'mp_register_lapic'
      Signed-off-by: NVivek Goyal <vgoyal@in.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      4a5d107a
  10. 07 12月, 2006 1 次提交
  11. 26 9月, 2006 5 次提交
  12. 01 7月, 2006 1 次提交
  13. 09 5月, 2006 1 次提交
    • K
      [PATCH] x86_64: avoid IRQ0 ioapic pin collision · e0c1e9bf
      Kimball Murray 提交于
      The patch addresses a problem with ACPI SCI interrupt entry, which gets
      re-used, and the IRQ is assigned to another unrelated device.  The patch
      corrects the code such that SCI IRQ is skipped and duplicate entry is
      avoided.  Second issue came up with VIA chipset, the problem was caused by
      original patch assigning IRQs starting 16 and up.  The VIA chipset uses
      4-bit IRQ register for internal interrupt routing, and therefore cannot
      handle IRQ numbers assigned to its devices.  The patch corrects this
      problem by allowing PCI IRQs below 16.
      
      Cc: len.brown@intel.com
      
      Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e0c1e9bf
  14. 11 4月, 2006 2 次提交
    • R
      [PATCH] mpparse: prevent table index out-of-bounds · c0ec31ad
      Randy Dunlap 提交于
      John Z. Bohach <jzb@aexorsyst.com> found this bug:
      
        If the board has more than 32 PCI busses on it, the mptable bus array will
        overwrite its bounds for the PCI busses, and stomp on anything that's after
        it.
      
      Prevent possible table overflow and unknown data corruption.  Code is in an
      __init section so it will be discarded after init.
      Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      c0ec31ad
    • A
      [PATCH] swsusp: don't require bigsmp · 6cf272ac
      Ashok Raj 提交于
      Switching to automatic bigsmp causes a misleading error message, that more
      then 8 cpus are detected, and user needs to select either X86_GENERICARCH
      or X86_BIGSMP to handle.
      
      Reason is we switched to bigsmp to avoid IP race when new cpu is comming
      up.  [bigsmp is nothing but using physical flat mode that can work for 1 ..
       255 cpus] [default is X86_PC, that uses logical flat mode up to 8 CPUs
      max] Current x86_64 code uses bigsmp as default when hotplug is enabled.
      
      It would be preferable to make bigsmp as default, and work the dependencies
      of other related code like SMP_SUSPEND, and some related to memory hotplug
      code for i386.
      
      Current logical flat mode doesnt use shortcuts that cause the race by using
      the send_IPI_mask() instead of shortcuts when HOTPLUG_CPU is enabled.
      
      In the meantime this patch is the path of lease resistance.
      
      We will switch to bigsmp default sometime soon, when we get to work it again.
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
      Cc: Nigel Cunningham <nigel@suspend2.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      6cf272ac
  15. 10 4月, 2006 1 次提交
    • A
      [PATCH] i386: Consolidate modern APIC handling · 95d769aa
      Andi Kleen 提交于
      AMD systems have a modern APIC that supports 8 bit IDs, but
      don't have a XAPIC version number.  Add a new "modern_apic"
      subfunction that handles this correctly and use it (nearly)
      everywhere where XAPIC is tested for.
      
      I removed one wart: the code specified that external APICs
      would use an 8bit APIC ID. But I checked a real 82093 data sheet
      and it says clearly that they only use 4bit. So I removed
      this special case since it would a bit awkward to implement now.
      
      I removed the valid APIC tests in mptable parsing completely. On any modern
      system they only check against the full field width (8bit) anyways
      and are no-ops. This also fixes them doing the wrong thing
      on >8 core Opterons.
      
      This makes i386 boot again on 16 core Opterons.
      
      Cc: Ingo Molnar <mingo@elte.hu>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      95d769aa
  16. 23 3月, 2006 2 次提交
  17. 27 2月, 2006 1 次提交
  18. 21 2月, 2006 1 次提交
  19. 07 1月, 2006 1 次提交
  20. 28 12月, 2005 1 次提交
  21. 21 11月, 2005 1 次提交
  22. 31 10月, 2005 2 次提交
  23. 27 9月, 2005 1 次提交