1. 01 6月, 2015 1 次提交
  2. 19 5月, 2015 1 次提交
  3. 11 5月, 2015 1 次提交
    • P
      drm/i915: Avoid GPU hang when coming out of s3 or s4 · 364aece0
      Peter Antoine 提交于
      This patch fixes a timing issue that causes a GPU hang when the system
      comes out of power saving.
      
      During pm_resume, We are submitting batchbuffers before enabling
      Interrupts this is causing us to miss the context switch interrupt,
      and in consequence intel_execlists_handle_ctx_events is not triggered.
      
      This patch is based on a patch from Deepak S <deepak.s@intel.com>
      from another platform.
      
      The patch fixes an issue introduced by:
        commit e7778be1
        drm/i915: Fix startup failure in LRC mode after recent init changes
      
      The above patch added a call to init_context() to fix an issue introduced
      by a previous patch. But, it then opened up a small timing window for the
      batches being added by the init_context (basically setting up the context)
      to complete before the interrupts have been turned on, thus hanging the
      GPU.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89600
      Cc: stable@vger.kernel.org # 4.0+
      Signed-off-by: NPeter Antoine <peter.antoine@intel.com>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      [Jani: fixed typo in subject, massaged the comments a bit]
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      364aece0
  4. 07 5月, 2015 2 次提交
  5. 06 5月, 2015 1 次提交
  6. 05 5月, 2015 2 次提交
  7. 28 4月, 2015 1 次提交
  8. 24 4月, 2015 3 次提交
    • I
      drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg · b5f1c97f
      Imre Deak 提交于
      Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
      suspend/resume, so fix this.
      
      This was introduced in
      
      commit ddeea5b0
      Author: Imre Deak <imre.deak@intel.com>
      Date:   Mon May 5 15:19:56 2014 +0300
      
          drm/i915: vlv: add runtime PM support
      
      I noticed this only by reading the code. To my knowledge it shouldn't
      cause any real problems at the moment, since the power well backing this
      register remains on across a runtime s/r. This may change once
      system-wide s0ix functionality is enabled in the kernel.
      
      v2:
      - resend after a missing git add -u :/
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      b5f1c97f
    • M
      drm/i915: Workaround to avoid lite restore with HEAD==TAIL · 53292cdb
      Michel Thierry 提交于
      WaIdleLiteRestore is an execlists-only workaround, and requires the driver
      to ensure that any context always has HEAD!=TAIL when attempting lite
      restore.
      
      Add two extra MI_NOOP instructions at the end of each request, but keep
      the requests tail pointing before the MI_NOOPs. We may not need to
      executed them, and this is why request->tail is sampled before adding
      these extra instructions.
      
      If we submit a context to the ELSP which has previously been submitted,
      move the tail pointer past the MI_NOOPs. This ensures HEAD!=TAIL.
      
      v2: Move overallocation to gen8_emit_request, and added note about
      sampling request->tail in commit message (Chris).
      
      v3: Remove redundant request->tail assignment in __i915_add_request, in
      lrc mode this is already set in execlists_context_queue.
      Do not add wa implementation details inside gem (Chris).
      
      v4: Apply the wa whenever the req has been resubmitted and update
      comment (Chris).
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NThomas Daniel <thomas.daniel@intel.com>
      Signed-off-by: NMichel Thierry <michel.thierry@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      53292cdb
    • D
      drm/i915: cope with large i2c transfers · 9535c475
      Dmitry Torokhov 提交于
      The hardware, according to the specs, is limited to 256 byte transfers,
      and current driver has no protections in case users attempt to do larger
      transfers. The code will just stomp over status register and mayhem
      ensues.
      
      Let's split larger transfers into digestable chunks. Doing this allows
      Atmel MXT driver on Pixel 1 function properly (it hasn't since commit
      9d8dc3e5 "Input: atmel_mxt_ts -
      implement T44 message handling" which tries to consume multiple
      touchscreen/touchpad reports in a single transaction).
      
      Cc: stable@vger.kernel.org
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      9535c475
  9. 21 4月, 2015 1 次提交
  10. 17 4月, 2015 1 次提交
  11. 14 4月, 2015 2 次提交
  12. 13 4月, 2015 1 次提交
  13. 10 4月, 2015 3 次提交
  14. 08 4月, 2015 1 次提交
  15. 07 4月, 2015 3 次提交
  16. 02 4月, 2015 1 次提交
  17. 30 3月, 2015 1 次提交
  18. 28 3月, 2015 1 次提交
  19. 27 3月, 2015 13 次提交