- 11 12月, 2008 9 次提交
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由 David Brownell 提交于
Minor GPIO fixes: - If get_gpio_bank() fails, then BUG() out. - In omap_set_gpio_debounce(): * protect the read/modify/write with the relevant spinlock * make the omap3 clock ops pass "sparse" checking Except for the spinlock problem, these were reported through "make". Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jarkko Nikula 提交于
Clean up OMAP GPIO request/free functions - Rename and declare static OMAP specific GPIO request/free functions - Register them into gpiolib as chip-specific hooks - Add omap_request_gpio/omap_free_gpio wrappers for existing code not converted yet to use gpiolib Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> [ dbrownell@users.sourceforge.net: remove needless check_gpio() calls ] Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 David Brownell 提交于
Have most uses of OMAP_GPIO_IRQ() use gpio_to_irq() instead. Calls used for table initialization are left alone, at least this time around. (This patch is for code in both the OMAP tree and mainline.) Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 David Brownell 提交于
More conversion to the standard GPIO interfaces: stop using omap_set_gpio_direction() entirely, and switch over to the gpio_direction_output() call. Note that because gpio_direction_output() includes the initial value, this change isn't quite transparent. - For the call sites which defined an initial value either before or after setting the direction, that value was used. When that value was previously assigned afterwards, this could eliminate a brief output glitch ... and possibly change behavior. In a few cases (LCDs) several values were assigned together ... those were re-arranged to match the explicit sequence provided. - Some call sites didn't define such a value; so I chose an initial "off/reset" value that seemed to default to "off". In short, files touched by this patch might notice some small changes in startup behavior (with trivial fixes). Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 David Brownell 提交于
More switchover to the cross-platform GPIO interface: use gpio_direction_input(), not an OMAP-specific call. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 David Brownell 提交于
This patch replaces some legacy OMAP GPIO calls with the "new" (not really, any more!) calls that work on most platforms. The calls addressed by this patch are the simple ones to get and set values ... for code that's in mainline, including the implementations of those calls. Except for the declarations and definitions of those calls, all of these changes were performed by a simple SED script. Plus, a few "if() set() else set()" branches were merged by hand. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 David Brownell 提交于
Make OMAP use the new __gpio_to_irq() hook, to make it easier to support IRQs coming in from off-chip gpio controllers like the TWL4030/TPS65930 chip used on OMAP3 boads like Beagleboard.org and the Gumstix Overo. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jarkko Nikula 提交于
There are already various drivers having bigger label than 10 bytes. Most of them fit well under 20 bytes but make column width exact so that oversized labels don't mess up output alignment. Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jouni Hogander 提交于
This patch changes gpio "driver" to enable debounce clock for gpio-bank only when debounce is enabled for some gpio in that bank. Gpio functional clocks are also renamed in clock tree, gpioX_fck -> gpioX_dbck. This patch triggers problem with gpio wake-up and Omap3. Gpios in PER domain aren't capable to generate wake-up if PER domain is in sleep state. For this iopad wake-up should be used and needed pad configuration should be done. Enabling iopad wake-up for gpio pads is left for bootloader or omap mux configuration in kernel. Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 12月, 2008 1 次提交
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由 Russell King 提交于
On ARMv6 and later CPUs, it is possible for userspace processes to get stuck on a misaligned load or store due to the "ignore fault" setting; unlike previous CPUs, retrying the instruction without the 'A' bit set does not always cause the load to succeed. We have no real option but to default to fixing up alignment faults on these CPUs, and having the CPU fix up those misaligned accesses which it can. Reported-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 12月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Commit 8ec53663 ("[ARM] Improve non-executable support") added support for detecting non-executable stack binaries. One of the things it does is to make READ_IMPLIES_EXEC be set in ->personality if we are running on a CPU that doesn't support the XN ("Execute Never") page table bit or if we are running a binary that needs an executable stack. This exposed a latent bug in ARM's asm/processor.h due to which we'll end up placing the stack at a very low address, where it will bump into the heap on any application that uses significant amount of stack or heap or both, causing many interesting crashes. Fix this by testing the ADDR_LIMIT_32BIT bit in ->personality instead of testing for equality against PER_LINUX_32BIT. Reviewed-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 12月, 2008 1 次提交
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由 Nicolas Pitre 提交于
Commit 0c65f459 intended to fix truncation issues with fls() on ARMv5+ by renaming it to __fls() and wrapping it into a C function. However that didn't take into account the fact that __fls() already already had different semantics in the kernel. Let's move the __fls() code into fls() function directly, and redefine __fls() with the appropriate semantics. While at it, bring a generic __fls() definition for pre ARMv5 too. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 12月, 2008 1 次提交
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由 Saeed Bishara 提交于
The function field is 3 bits. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 02 12月, 2008 2 次提交
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由 Ben Dooks 提交于
The spi master driver must have num_chipselect set to allow the bus to initialise. Pass this through the platform data. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Russell King 提交于
This patch fixes a number of sillies, from missing 'const' to using 'return' in void functions, to functions with no arguments not even 'void' and a cast which isn't required. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 11月, 2008 2 次提交
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Tero Kristo 提交于
Use the correct wake-up enable register, and make it work with 34xx also. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 26 11月, 2008 3 次提交
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Guennadi Liakhovetski 提交于
0 is a valid GPIO number, use a negative number to specify, that this camera doesn't have a GPIO for bus-width switching. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Amit Kucheria 提交于
The second clk_deny_idle instance should be clk_allow_idle instead. Signed-off-by: NAmit Kucheria <amit.kucheria@verdurent.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 11月, 2008 2 次提交
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由 Robert Jarzmik 提交于
The G3IPL expects the value at RAM address 0xa020b020 to be exactly 1 to setup the bluetooth GPIOs properly. The actual code got a value from gpio_get_value() which was not 1, but a "not equal to 0" integer. Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Robert Jarzmik 提交于
In the resume bootstrap, the early disable address is wrong. Fix it to RAM address 0xa020b000 instead of 0xa0200000, and make it consistent with RESUME_ENABLE_ADDR in mioa701.c. Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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- 17 11月, 2008 1 次提交
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由 Jaya Kumar 提交于
This patch makes do_hw_reset the default reboot behavior when nothing else matches. This restores reboot functionality on gumstix basix devices where reboot=cold is the default boot argument. Signed-off-by: NJaya Kumar <jayakumar.lkml@gmail.com> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 11月, 2008 2 次提交
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由 Eric Miao 提交于
The original incorrect configuration caused GPIO79_nCS_3 being overriden, thus resulted in the NAND flash not being detected. The real PSKTSEL pin is on GPIO104 instead of GPIO79. Signed-off-by: NEric Miao <eric.miao@marvell.com> Cc: Richard Purdie <rpurdie@rpsys.net>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com> Cc: Richard Purdie <rpurdie@rpsys.net>
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- 13 11月, 2008 4 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
FLASH_* and EPROM_* constants are unused, and clash with drivers: drivers/atm/ambassador.h:257:1: warning: "FLASH_BASE" redefined drivers/atm/ambassador.h:258:1: warning: "FLASH_SIZE" redefined drivers/atm/iphase.h:332:1: warning: "EPROM_SIZE" redefined so remove them. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
arch/arm/mm/dma-mapping.c: In function `dma_sync_sg_for_cpu': arch/arm/mm/dma-mapping.c:588: warning: statement with no effect Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 11月, 2008 1 次提交
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由 Dan Williams 提交于
Now that the critical read back to flush the next descriptor address is fixed we can downgrade some BUG_ONs that need only be enabled when testing changes to the driver. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 11 11月, 2008 1 次提交
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由 Eric Miao 提交于
Signed-off-by: NDaniel Mack <daniel@caiaq.de> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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- 09 11月, 2008 4 次提交
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由 Russell King 提交于
Mikael Pettersson reported: The 2.6.28-rc kernels fail to detect PCI device 0000:00:01.0 (the first ethernet port) on my Thecus n2100 XScale box. There is however still a strange "ghost" device that gets partially detected in 2.6.28-rc2 vanilla. The IOP321 manual says: The user designates the memory region containing the OCCDR as non-cacheable and non-bufferable from the IntelR XScaleTM core. This guarantees that all load/stores to the OCCDR are only of DWORD quantities. Ensure that the OCCDR is so mapped. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The MMC clock source is actually 24MHz, not 33MHz. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The MMC clock source is actually 24MHz, not 33MHz. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
Same fix as commit c7cf72dc: when 'start' and 'end' are less than a cacheline apart and 'start' is unaligned we are done after cleaning and invalidating the first cacheline. Cc: <stable@kernel.org> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 11月, 2008 3 次提交
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由 Dan Williams 提交于
When 'start' and 'end' are less than a cacheline apart and 'start' is unaligned we are done after cleaning and invalidating the first cacheline. So check for (start < end) which will not walk off into invalid address ranges when (start > end). This issue was caught by drivers/dma/dmatest. 2.6.27 is susceptible. Cc: <stable@kernel.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Lothar WaÃ<9f>mann <LW@KARO-electronics.de> Cc: Lennert Buytenhek <buytenh@marvell.com> Cc: Eric Miao <eric.miao@marvell.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Russell King 提交于
As a result of the ptebits changes, we ended up marking device mappings as normal memory on ARMv7 CPUs, resulting in undesirable behaviour with serial ports and the like. While reviewing the section mapping table entries, other errors in the memory type settings for devices were detected and confirmed to prevent Xscale3 platforms booting. Tested on: OMAP34xx (ARMv7), OMAP24xx (ARMv6), OMAP16xx (ARM926T, ARMv5), PXA311 (Xscale3), PXA272 (Xscale), PXA255 (Xscale), IXP42x (Xscale), S3C2410 (ARM920T, ARMv4T), ARM720T (ARMv4T) StrongARM-110 (ARMv4) Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Tested-by: NMike Rapoport <mike@compulab.co.il> Tested-by: NBen Dooks <ben-linux@fluff.org> Tested-by: NAnders Grafström <grfstrm@users.sourceforge.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
As of 73bdf0a6, the kernel needs to know where modules are located in the virtual address space. On ARM, we located this region between MODULE_START and MODULE_END. Unfortunately, everyone else calls it MODULES_VADDR and MODULES_END. Update ARM to use the same naming, so is_vmalloc_or_module_addr() can work properly. Also update the comment on mm/vmalloc.c to reflect that ARM also places modules in a separate region from the vmalloc space. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 11月, 2008 2 次提交
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由 Tony Lindgren 提交于
Otherwise twl4030 gpios won't work. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
On omap24xx, INTCPS_SIR_IRQ_OFFSET bits [6:0] contains the current active interrupt number. However, on 34xx INTCPS_SIR_IRQ_OFFSET bits [31:7] also contains the SPURIOUSIRQFLAG, which gets set if the interrupt sorting information is invalid. If the SPURIOUSIRQFLAG bits are not ignored, the interrupt code will occasionally produce a bunch of confusing errors: irq -33, desc: c02ddcc8, depth: 0, count: 0, unhandled: 0 ->handle_irq(): c006f23c, handle_bad_irq+0x0/0x22c ->chip(): 00000000, 0x0 ->action(): 00000000 Fix this by masking out only the ACTIVEIRQ bits. Also fix a confusing comment. Signed-off-by: NTony Lindgren <tony@atomide.com>
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