Fix UART1 IOMUX settings and configure UART1 to work with only RX/TX pins.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This iomux file contains all the available pins that are iomux
capable.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add spi board information for spi nor device
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add ecspi IOMUX setting, also fix a bug of chip select pin order
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. some macro definitions fix
2. add platform data for spi device
3. register spi clocks
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. changes some register address to fit macro definition
2. add platform data and clock for sdhc
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add i2c platform data and clock
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. Adjust FEC base address name to fit macro definition
2. Add platform data and reset function for FEC
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>