1. 29 4月, 2009 9 次提交
  2. 09 4月, 2009 1 次提交
  3. 07 4月, 2009 2 次提交
  4. 06 4月, 2009 12 次提交
  5. 08 3月, 2009 2 次提交
  6. 06 3月, 2009 2 次提交
  7. 02 3月, 2009 2 次提交
  8. 28 2月, 2009 2 次提交
  9. 11 2月, 2009 1 次提交
    • P
      perf_counters: allow users to count user, kernel and/or hypervisor events · 0475f9ea
      Paul Mackerras 提交于
      Impact: new perf_counter feature
      
      This extends the perf_counter_hw_event struct with bits that specify
      that events in user, kernel and/or hypervisor mode should not be
      counted (i.e. should be excluded), and adds code to program the PMU
      mode selection bits accordingly on x86 and powerpc.
      
      For software counters, we don't currently have the infrastructure to
      distinguish which mode an event occurs in, so we currently fail the
      counter initialization if the setting of the hw_event.exclude_* bits
      would require us to distinguish.  Context switches and CPU migrations
      are currently considered to occur in kernel mode.
      
      On x86, this changes the previous policy that only root can count
      kernel events.  Now non-root users can count kernel events or exclude
      them.  Non-root users still can't use NMI events, though.  On x86 we
      don't appear to have any way to control whether hypervisor events are
      counted or not, so hw_event.exclude_hv is ignored.
      
      On powerpc, the selection of whether to count events in user, kernel
      and/or hypervisor mode is PMU-wide, not per-counter, so this adds a
      check that the hw_event.exclude_* settings are the same as other events
      on the PMU.  Counters being added to a group have to have the same
      settings as the other hardware counters in the group.  Counters and
      groups can only be enabled in hw_perf_group_sched_in or power_perf_enable
      if they have the same settings as any other counters already on the
      PMU.  If we are not running on a hypervisor, the exclude_hv setting
      is ignored (by forcing it to 0) since we can't ever get any
      hypervisor events.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      0475f9ea
  10. 09 2月, 2009 1 次提交
  11. 05 2月, 2009 1 次提交
  12. 23 1月, 2009 3 次提交
  13. 27 12月, 2008 1 次提交
  14. 23 12月, 2008 1 次提交
    • I
      x86, perfcounters: add support for fixed-function pmcs · 2f18d1e8
      Ingo Molnar 提交于
      Impact: extend performance counter support on x86 Intel CPUs
      
      Modern Intel CPUs have 3 "fixed-function" performance counters, which
      count these hardware events:
      
          Instr_Retired.Any
          CPU_CLK_Unhalted.Core
          CPU_CLK_Unhalted.Ref
      
      Add support for them to the performance counters subsystem.
      
      Their use is transparent to user-space: the counter scheduler is
      extended to automatically recognize the cases where a fixed-function
      PMC can be utilized instead of a generic PMC. In such cases the
      generic PMC is kept available for more counters.
      
      The above fixed-function events map to these generic counter hw events:
      
              PERF_COUNT_INSTRUCTIONS
              PERF_COUNT_CPU_CYCLES
              PERF_COUNT_BUS_CYCLES
      
      (The 'bus' cycles are in reality often CPU-ish cycles, just with a fixed
       frequency.)
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      2f18d1e8