1. 10 11月, 2009 2 次提交
  2. 08 11月, 2009 1 次提交
    • F
      x86: Use x86_platform for iommu_shutdown · 338bac52
      FUJITA Tomonori 提交于
      This patch cleans up pci_iommu_shutdown() a bit to use
      x86_platform (similar to how IA64 initializes an IOMMU driver).
      
      This adds iommu_shutdown() to x86_platform to avoid calling
      every IOMMUs' shutdown functions in pci_iommu_shutdown() in
      order. The IOMMU shutdown functions are platform specific (we
      don't have multiple different IOMMU hardware) so the current way
      is pointless.
      
      An IOMMU driver sets x86_platform.iommu_shutdown to the shutdown
      function if necessary.
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Cc: joerg.roedel@amd.com
      LKML-Reference: <20091027163358F.fujita.tomonori@lab.ntt.co.jp>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      338bac52
  3. 12 10月, 2009 1 次提交
  4. 28 7月, 2009 1 次提交
  5. 09 7月, 2009 1 次提交
  6. 06 6月, 2009 1 次提交
    • M
      x86: enable GART-IOMMU only after setting up protection methods · fe2245c9
      Mark Langsdorf 提交于
      The current code to set up the GART as an IOMMU enables GART
      translations before it removes the aperture from the kernel memory
      map, sets the GART PTEs to UC, sets up the guard and scratch
      pages, or does a wbinvd().  This leaves the possibility of cache
      aliasing open and can cause system crashes.
      
      Re-order the code so as to enable the GART translations only
      after all safeguards are in place and the tlb has been flushed.
      
      AMD has tested this patch on both Istanbul systems and 1st
      generation Opteron systems with APG enabled and seen no adverse
      effects.  Istanbul systems with HT Assist enabled sometimes
      see MCE errors due to cache artifacts with the unmodified
      code.
      Signed-off-by: NMark Langsdorf <mark.langsdorf@amd.com>
      Cc: <stable@kernel.org>
      Cc: Joerg Roedel <joerg.roedel@amd.com>
      Cc: akpm@linux-foundation.org
      Cc: jbarnes@virtuousgeek.org
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      fe2245c9
  7. 15 4月, 2009 1 次提交
  8. 30 1月, 2009 1 次提交
  9. 06 1月, 2009 3 次提交
  10. 30 12月, 2008 1 次提交
  11. 18 12月, 2008 1 次提交
  12. 03 12月, 2008 2 次提交
  13. 29 10月, 2008 1 次提交
    • J
      x86, gart: fix gart detection for Fam11h CPUs · 87c6f401
      Joerg Roedel 提交于
      Impact: fix AMD Family 11h boot hangs / USB device problems
      
      The AMD Fam11h CPUs have a K8 northbridge. This northbridge is different
      from other family's because it lacks GART support (as I just learned).
      
      But the kernel implicitly expects a GART if it finds an AMD northbridge.
      
      Fix this by removing the Fam11h northbridge id from the scan list of K8
      northbridges. This patch also changes the message in the GART driver
      about missing K8 northbridges to tell that the GART is missing which is
      the correct information in this case.
      Reported-by: NJouni Malinen <jkmalinen@gmail.com>
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      87c6f401
  14. 17 10月, 2008 2 次提交
  15. 05 10月, 2008 1 次提交
  16. 28 9月, 2008 3 次提交
  17. 25 9月, 2008 3 次提交
    • F
      x86 gart: remove unnecessary initialization · 1615965e
      FUJITA Tomonori 提交于
      There is no point to have such initialization in struct dma_mapping_ops.
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1615965e
    • F
      x86: restore old GART alloc_coherent behavior · 1d990882
      FUJITA Tomonori 提交于
      Currently, GART alloc_coherent tries to allocate pages with GFP_DMA32
      for a device having dma_masks > 24bit < 32bits. If GART gets an
      address that a device can't access to, GART try to map the address to
      a virtual I/O address that the device can access to.
      
      But Andi pointed out, "The GART is somewhere in the 4GB range so you
      cannot use it to map anything < 4GB. Also GART is pretty small."
      
      http://lkml.org/lkml/2008/9/12/43
      
      That is, it's possible that GART doesn't have virtual I/O address
      space that a device can access to. The above behavior doesn't work for
      a device having dma_masks > 24bit < 32bits.
      
      This patch restores old GART alloc_coherent behavior (before the
      alloc_coherent rewrite).
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1d990882
    • F
      revert "x86: make GART to respect device's dma_mask about virtual mappings" · ecef533e
      FUJITA Tomonori 提交于
      This reverts:
      
      commit bee44f29
      Author: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Date:   Fri Sep 12 19:42:35 2008 +0900
      
          x86: make GART to respect device's dma_mask about virtual mappings
      
      I wrote the above commit to fix a GART alloc_coherent regression, that
      can't handle a device having dma_masks > 24bit < 32bits, introduced by
      the alloc_coherent rewrite:
      
        http://lkml.org/lkml/2008/8/12/200
      
      After the alloc_coherent rewrite, GART alloc_coherent tried to
      allocate pages with GFP_DMA32. If GART got an address that a device
      can't access to, GART mapped the address to a virtual I/O address. But
      GART mapping mechanism didn't take account of dma mask, so GART could
      use a virtual I/O address that the device can't access to again.
      
      Alan pointed out:
      
      " This is indeed a specific problem found with things like older
        AACRAID where control blocks must be below 31bits and the GART
        is above 0x80000000. "
      
      The above commit modified GART mapping mechanism to take care of dma
      mask. But Andi pointed out, "The GART is somewhere in the 4GB range so
      you cannot use it to map anything < 4GB. Also GART is pretty small."
      
      http://lkml.org/lkml/2008/9/12/43
      
      That means it's possible that GART doesn't have virtual I/O address
      space that a device can access to. The above commit (to modify GART
      mapping mechanism to take care of dma mask) can't fix the regression
      reliably so let's avoid making GART more complicated.
      
      We need a solution that always works for dma_masks > 24bit <
      32bits. That's how GART worked before the alloc_coherent rewrite.
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Acked-by: NJoerg Roedel <joerg.roedel@amd.com>
      Acked-by: NAlan Cox <alan@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ecef533e
  18. 23 9月, 2008 1 次提交
  19. 22 9月, 2008 1 次提交
  20. 19 9月, 2008 1 次提交
  21. 14 9月, 2008 2 次提交
  22. 10 9月, 2008 1 次提交
  23. 05 9月, 2008 1 次提交
  24. 22 8月, 2008 5 次提交
  25. 18 8月, 2008 1 次提交
  26. 27 7月, 2008 1 次提交
    • F
      dma-mapping: add the device argument to dma_mapping_error() · 8d8bb39b
      FUJITA Tomonori 提交于
      Add per-device dma_mapping_ops support for CONFIG_X86_64 as POWER
      architecture does:
      
      This enables us to cleanly fix the Calgary IOMMU issue that some devices
      are not behind the IOMMU (http://lkml.org/lkml/2008/5/8/423).
      
      I think that per-device dma_mapping_ops support would be also helpful for
      KVM people to support PCI passthrough but Andi thinks that this makes it
      difficult to support the PCI passthrough (see the above thread).  So I
      CC'ed this to KVM camp.  Comments are appreciated.
      
      A pointer to dma_mapping_ops to struct dev_archdata is added.  If the
      pointer is non NULL, DMA operations in asm/dma-mapping.h use it.  If it's
      NULL, the system-wide dma_ops pointer is used as before.
      
      If it's useful for KVM people, I plan to implement a mechanism to register
      a hook called when a new pci (or dma capable) device is created (it works
      with hot plugging).  It enables IOMMUs to set up an appropriate
      dma_mapping_ops per device.
      
      The major obstacle is that dma_mapping_error doesn't take a pointer to the
      device unlike other DMA operations.  So x86 can't have dma_mapping_ops per
      device.  Note all the POWER IOMMUs use the same dma_mapping_error function
      so this is not a problem for POWER but x86 IOMMUs use different
      dma_mapping_error functions.
      
      The first patch adds the device argument to dma_mapping_error.  The patch
      is trivial but large since it touches lots of drivers and dma-mapping.h in
      all the architecture.
      
      This patch:
      
      dma_mapping_error() doesn't take a pointer to the device unlike other DMA
      operations.  So we can't have dma_mapping_ops per device.
      
      Note that POWER already has dma_mapping_ops per device but all the POWER
      IOMMUs use the same dma_mapping_error function.  x86 IOMMUs use device
      argument.
      
      [akpm@linux-foundation.org: fix sge]
      [akpm@linux-foundation.org: fix svc_rdma]
      [akpm@linux-foundation.org: build fix]
      [akpm@linux-foundation.org: fix bnx2x]
      [akpm@linux-foundation.org: fix s2io]
      [akpm@linux-foundation.org: fix pasemi_mac]
      [akpm@linux-foundation.org: fix sdhci]
      [akpm@linux-foundation.org: build fix]
      [akpm@linux-foundation.org: fix sparc]
      [akpm@linux-foundation.org: fix ibmvscsi]
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Avi Kivity <avi@qumranet.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8d8bb39b