1. 31 1月, 2009 3 次提交
  2. 30 1月, 2009 8 次提交
  3. 29 1月, 2009 1 次提交
    • N
      [ARM] 5366/1: fix shared memory coherency with VIVT L1 + L2 caches · 08e445bd
      Nicolas Pitre 提交于
      When there are multiple L1-aliasing userland mappings of the same physical
      page, we currently remap each of them uncached, to prevent VIVT cache
      aliasing issues. (E.g. writes to one of the mappings not being immediately
      visible via another mapping.)  However, when we do this remapping, there
      could still be stale data in the L2 cache, and an uncached mapping might
      bypass L2 and go straight to RAM.  This would cause reads from such
      mappings to see old data (until the dirty L2 line is eventually evicted.)
      
      This issue is solved by forcing a L2 cache flush whenever the shared page
      is made L1 uncacheable.
      
      Ideally, we would make L1 uncacheable and L2 cacheable as L2 is PIPT. But
      Feroceon does not support that combination, and the TEX=5 C=0 B=0 encoding
      for XSc3 doesn't appear to work in practice.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      08e445bd
  4. 28 1月, 2009 7 次提交
  5. 27 1月, 2009 16 次提交
  6. 26 1月, 2009 5 次提交
    • R
      x86: fix section mismatch warning · 659d2618
      Rakib Mullick 提交于
      Here function vmi_activate calls a init function activate_vmi , which
      causes the following section mismatch warnings:
      
        LD      arch/x86/kernel/built-in.o
      WARNING: arch/x86/kernel/built-in.o(.text+0x13ba9): Section mismatch
      in reference from the function vmi_activate() to the function
      .init.text:vmi_time_init()
      The function vmi_activate() references
      the function __init vmi_time_init().
      This is often because vmi_activate lacks a __init
      annotation or the annotation of vmi_time_init is wrong.
      
      WARNING: arch/x86/kernel/built-in.o(.text+0x13bd1): Section mismatch
      in reference from the function vmi_activate() to the function
      .devinit.text:vmi_time_bsp_init()
      The function vmi_activate() references
      the function __devinit vmi_time_bsp_init().
      This is often because vmi_activate lacks a __devinit
      annotation or the annotation of vmi_time_bsp_init is wrong.
      
      WARNING: arch/x86/kernel/built-in.o(.text+0x13bdb): Section mismatch
      in reference from the function vmi_activate() to the function
      .devinit.text:vmi_time_ap_init()
      The function vmi_activate() references
      the function __devinit vmi_time_ap_init().
      This is often because vmi_activate lacks a __devinit
      annotation or the annotation of vmi_time_ap_init is wrong.
      
      Fix it by marking vmi_activate() as __init too.
      Signed-off-by: NRakib Mullick <rakib.mullick@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      659d2618
    • I
      x86: unmask CPUID levels on Intel CPUs, fix · 99fb4d34
      Ingo Molnar 提交于
      Impact: fix boot hang on pre-model-15 Intel CPUs
      
      rdmsrl_safe() does not work in very early bootup code yet, because we
      dont have the pagefault handler installed yet so exception section
      does not get parsed. rdmsr_safe() will just crash and hang the bootup.
      
      So limit the MSR_IA32_MISC_ENABLE MSR read to those CPU types that
      support it.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      99fb4d34
    • T
      libata-sff: fix incorrect EH message · 80ee6f54
      Tejun Heo 提交于
      The EH message for NODEV_HINT path was describing the opposite
      condition.  Fix it.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      80ee6f54
    • E
      x86: work around PAGE_KERNEL_WC not getting WC in iomap_atomic_prot_pfn. · ef5fa0ab
      Eric Anholt 提交于
      In the absence of PAT, PAGE_KERNEL_WC ends up mapping to a memory type that
      gets UC behavior even in the presence of a WC MTRR covering the area in
      question.  By swapping to PAGE_KERNEL_UC_MINUS, we can get the actual
      behavior the caller wanted (WC if you can manage it, UC otherwise).
      
      This recovers the 40% performance improvement of using WC in the DRM
      to upload vertex data.
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      ef5fa0ab
    • R
      [ARM] fix section-based ioremap · 24f11ec0
      Russell King 提交于
      Tomi Valkeinen reports:
        Running with latest linux-omap kernel on OMAP3 SDP board, I have
        problem with iounmap(). It looks like iounmap() does not properly
        free large areas. Below is a test which fails for me in 6-7 loops.
      
      	for (i = 0; i < 200; ++i) {
      		vaddr = ioremap(paddr, size);
      		if (!vaddr) {
      			printk("couldn't ioremap\n");
      			break;
      		}
      		iounmap(vaddr);
      	}
      
      The changes to vmalloc.c weren't reflected in the ARM ioremap
      implementation.  Turns out the fix is rather simple.
      Tested-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
      Tested-by: NMatt Gerassimoff <mgeras@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      24f11ec0