- 12 1月, 2015 2 次提交
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由 Soren Brinkmann 提交于
Additionally to the generic DT parameters, allow drivers to provide driver-specific DT parameters to be used with the generic parser infrastructure. To achieve this 'struct pinctrl_desc' is extended to pass custom pinconf option to the core. In order to pass this kind of information, the related data structures - 'struct pinconf_generic_dt_params', 'pin_config_item' - are moved from pinconf internals to the pinconf-generic header. Additionally pinconfg-generic is refactored to not only iterate over the generic pinconf parameters but also take the parameters into account that are provided through the driver's 'struct pinctrl_desc'. In particular 'pinconf_generic_parse_dt_config()' and 'pinconf_generic_dump' helpers are split into two parts each. In order to have a more generic helper that can be used to process the generic parameters as well as the driver-specific ones. v2: - fix typo - add missing documentation for @conf_items member in struct - rebase to pinctrl/devel: conflict in abx500 - rename _pinconf_generic_dump() to pinconf_generic_dump_one() - removed '_' from _parse_dt_cfg() - removed BUG_ONs, error condition is handled in if statements - removed pinconf_generic_dump_group() & pinconf_generic_dump_pin helpers - fixed up corresponding call sites - renamed pinconf_generic_dump() to pinconf_generic_dump_pins() - added kernel-doc to pinconf_generic_dump_pins() - add kernel-doc - more verbose commit message Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Soren Brinkmann 提交于
With the new 'groups' property, the DT parser can infer the map type from the fact whether 'pins' or 'groups' is used to specify the pin group to work on. To maintain backwards compatibitliy with current usage of the DT binding, this is only done when PIN_MAP_TYPE_INVALID is passed to the parsing function as type. Also, a new helper 'pinconf_generic_dt_node_to_map_all()' is introduced, which can be used by drivers as generic callback for dt_node_to_map() to leverage the new feature. Changes since v2: - rename dt_pin_specifier to subnode_target_type - add additional comment in header file explaining passing an invalid map type - mention map_all() helper in commit message Changes since RFC v2: - none Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 1月, 2015 4 次提交
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由 Linus Walleij 提交于
When drivers are compiled in subdirectories the -DDEBUG flag need to be passed in the individual Makefiles. Reported-by: NMika Westerberg <mika.westerberg@linux.intel.com> Suggested-by: NYingjoe Chen <yingjoe.chen@mediatek.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Ripard 提交于
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1 function. Add this case to the pinctrl driver. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wolfram Sang 提交于
This platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
Before resuming from system sleep BIOS restores its view of pin configuration. If we have configured some pins differently from that, for instance some driver requested a pin as a GPIO but it was not in GPIO mode originally, our view of the pin configuration will not match the hardware state anymore. This patch saves the pin configuration and interrupt mask registers on suspend and restores them on exit. This should make sure that the previously configured state is still in effect. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 12月, 2014 1 次提交
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由 Matthieu Crapet 提交于
When a pin is configured as GPIO, print also direction (input or output). Signed-off-by: NMatthieu Crapet <mcrapet@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 11月, 2014 1 次提交
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由 Heikki Krogerus 提交于
The users of the old method are now converted to the new one. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> [ kishon@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated devm_phy_create API.] Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 11 11月, 2014 1 次提交
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由 Soren Brinkmann 提交于
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 11月, 2014 10 次提交
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由 Tomasz Figa 提交于
The pin controllers of Exynos4415 are similar to Exynos4412, but certain differences cause the need to create separate driver data for it. This patch adds pin controller and bank descriptor arrays to the driver to support the new SoC. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> [cw00.choi: Rebase it on mainline kernel] Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> [tomasz.figa@gmail.com: Resolved merge with earlier clean-up series.] Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Naveen Krishna Ch 提交于
This patch adds initial driver data for Exynos7 pinctrl support. Signed-off-by: NNaveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NThomas Abraham <thomas.ab@samsung.com> Tested-by: NThomas Abraham <thomas.ab@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Abhilash Kesavan 提交于
Exynos7 uses different offsets for wakeup interrupt configuration registers. So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip selection is now based on the wakeup interrupt controller compatible string. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NThomas Abraham <thomas.ab@samsung.com> Tested-by: NThomas Abraham <thomas.ab@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Abhilash Kesavan 提交于
Adding a irq_chip field to the samsung_pin_bank struct helps in consolidating the irq domain callbacks for external gpio and wakeup interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops have now been merged into a single exynos_eint_irqd_ops. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NThomas Abraham <thomas.ab@samsung.com> Tested-by: NThomas Abraham <thomas.ab@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Abhilash Kesavan 提交于
The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external interrupt pending status and mask registers. So this function is not extensible for Exynos7 SoC which has these registers at different offsets. Generalize the exynos_irq_demux_eint16_31 function by using the pending/mask register offset values from the exynos_irq_chip structure. This is done by adding a irq_chip field to the samsung_pin_bank struct. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NThomas Abraham <thomas.ab@samsung.com> Tested-by: NThomas Abraham <thomas.ab@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Tomasz Figa 提交于
Currently the driver mixes constant init data with runtime data, which is far from being elegant and can invite potential hard to track issues. This patch intends to solve this by introducing a new samsung_pin_bank_data structure to hold only constant data known at compile time, which can be copied to main samsung_pin_bank struct used at runtime. In addition, thanks to this change, all per-bank initdata can be marked with const and __initconst keywords and dropped after init completes. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Tomasz Figa 提交于
In order to separate initialization constants from runtime data, this patch modifies the driver to store only constant data in samsung_pin_ctrl struct and copy data required at runtime to samsung_pinctrl_drv_data struct. This makes it possible to mark all existing instances of samsung_pin_ctrl struct as const and __initconst. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Tomasz Figa 提交于
This structure is not intended to be modified at runtime and functions as constant data shared between multiple pin banks. This patch makes all instances of it constant across the driver. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Tomasz Figa 提交于
There is no code using it and in fact there are pin controller variants that do not even have this field initialized in their init data. This patch removes it completely. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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由 Tomasz Figa 提交于
Currently the function returns a valid pointer on success and NULL on error, so exact error code is lost. This patch changes return convention of the function to use ERR_PTR() on error instead. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
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- 04 11月, 2014 1 次提交
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由 Mika Westerberg 提交于
This driver supports the pin/GPIO controllers found in newer Intel SoCs like Cherryview and Braswell. The driver provides full GPIO support and minimal set of pin controlling funtionality. The driver is based on the original Cherryview GPIO driver authored by Ning Li and Alan Cox. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 11月, 2014 2 次提交
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由 Chris Zhong 提交于
Save and restore the gpio6_c6 pinmux setting, since Maskrom of RK3288 would modify it to sdmmc0_det, so it need to be restored to the correct setting after resume from Maskrom. Signed-off-by: NChris Zhong <zyw@rock-chips.com> Tested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Chris Zhong 提交于
support suspend/resume of pinctrl, it allows handling sleep mode for hogged pins in pinctrl Signed-off-by: NChris Zhong <zyw@rock-chips.com> Tested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 31 10月, 2014 1 次提交
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由 Varka Bhadram 提交于
Sanity check on resource happening with devm_ioremap_resource(). Signed-off-by: NVarka Bhadram <varkab@cdac.in> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 10月, 2014 7 次提交
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由 Maxime Ripard 提交于
The A80 has a rather usual pin controller, the only thing out of the ordinary being that it has 5 interrupts banks, and that some pins have several options for the same functions. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Ripard 提交于
The A80 R-PIO controller has one more bank that what we've seen so far, add the PN pin bank. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Uwe Kleine-König 提交于
The mxs pinctrl driver cannot handle when functions are not grouped by name (which IMO is a bug). This happens for example if a imx28-somemachine.dts provides a function that has the same name as a function defined in imx28.dtsi. The proper way to fix that would be to check for duplicates in the loops (which increases parsing time) or parse the groups first and sort the resulting array. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Anderson 提交于
There were a few instances where the rockchip pinctrl driver would do read-modify-write with no spinlock. Add a spinlock for these cases. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Doug Anderson 提交于
Just like in (529301c1 pinctrl: samsung: Parse pin groups before calling pinctrl_register()), Rockchip also needs to parse pin groups earlier to make hogs work. Signed-off-by: NDoug Anderson <dianders@chromium.org> Tested-by: NChris Zhong <zyw@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Doug Anderson 提交于
The Rockchip pinctrl driver was calling rockchip_gpio_direction_output() in the pin_config_set() callback. This was just a shortcut for: * rockchip_gpio_set() * pinctrl_gpio_direction_output() Unfortunately it's not so good to call pinctrl_gpio_direction_output() from pin_config_set(). Specifically when initting hogs you'll get an error. Let's refactor a little so we can call _rockchip_pmx_gpio_set_direction() directly. Signed-off-by: NDoug Anderson <dianders@chromium.org> Tested-by: NChris Zhong <zyw@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Doug Anderson 提交于
The rockchip pinctrl driver uses irq_gc_set_wake() but doesn't setup the .wake_enabled member. That means that we can never actually use a pin for wakeup. When "irq_set_irq_wake()" tries to call through it will always get a failure from set_irq_wake_real() and will then set wake_depth to 0. Assuming you can resume you'll later get an error message about "Unbalanced IRQ x wake disable". Signed-off-by: NDoug Anderson <dianders@chromium.org> Tested-by: NChris Zhong <zyw@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 29 10月, 2014 7 次提交
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由 Masanari Iida 提交于
This patch fix company name's spelling typo in module descriptions and a Kconfig. Signed-off-by: NMasanari Iida <standby24x7@gmail.com> Acked-by: NRandy Dunlap <rdunlap@infradead.org> Acked-by: NChris Snook <chris.snook@gmail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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由 Mika Westerberg 提交于
We are going to have more pinctrl drivers for Intel hardware so separate all our pin controller drivers to own directory. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Ivan T. Ivanov 提交于
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm MPP sub-function blocks found in the PMIC chips. Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com> Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Ivan T. Ivanov 提交于
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm GPIO sub-function blocks found in the PMIC chips. Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com> Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexandre Belloni 提交于
Copy the mach/at91_pio.h header locally and use it for pinctrl-at91.c. This allows to remove the dependency on mach/at91_pio.h to be able to move at91 to multiplatform. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexandre Courbot 提交于
This function actually operates on a gpio_chip, so its prefix should reflect that fact for consistency with other functions defined in gpio/driver.h. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Varka Bhadram 提交于
Sanity check on resource happening with devm_ioremap_resource(). Signed-off-by: NVarka Bhadram <varkab@cdac.in> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 10月, 2014 3 次提交
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由 Soren Brinkmann 提交于
When dumping pinconf information in debugfs, config arguments are only printed when a unit is present and the argument is != 0. For parameters like the slew rate, this does not work. The slew rate uses a driver specific format for the argument, i.e. 0 can be a valid argument and a unit is not provided for it. For that reason, add a flag to enable printing the argument instead of inferring it from the presence of a unit and the value of the argument. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
The pinctrl config helpers make a separate copy of the configuration, so callers must make sure to free any dynamically allocated memory that was used to store it. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Felipe Balbi 提交于
pinctrl-baytrail driver provides a proper ->remove() method on its platform_driver definition, however there's no way, currently, to unload the driver due to missing module_exit(). This patch adds module_exit(). Signed-off-by: NFelipe Balbi <balbi@ti.com> Acked-by: NDavid Cohen <david.a.cohen@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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