- 29 6月, 2011 4 次提交
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由 Benjamin Herrenschmidt 提交于
When CONFIG_PPC_EARLY_DEBUG is set, call register_early_udbg_console() early from generic code. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Dmitry Eremin-Solenikov 提交于
Currently Maple setup code creates cpc925_edac device only on Motorola ATCA-6101 blade. Make setup code check bridge revision and enable EDAC on all U3H bridges. Verified on Momentum MapleD (ppc970fx kit) board. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Akinobu Mita 提交于
Reconfiguration notifier call for device node may fail by several reasons, but it always assumes kmalloc failures. This enables reconfiguration notifier call chain to get the actual error code rather than -ENOMEM by converting all reconfiguration notifier calls to return encapsulate error code with notifier_from_errno(). Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Akinobu Mita 提交于
This introduces pSeries_reconfig_notify() as a just wrapper of blocking_notifier_call_chain() for pSeries_reconfig_chain. This is a preparation to improvement of error code on reconfiguration notifier failure. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 27 6月, 2011 8 次提交
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由 Timur Tabi 提交于
The Freescale hypervisor does not allow guests to write to the timebase registers (virtualizing the timebase register was deemed too complicated), so don't try to synchronize the timebase registers when we're running under the hypervisor. This typically happens when kexec support is enabled. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
mpc8610hpcd_set_pixel_clock() calculates the correct value of the PXCLK bits in the CLKDVDR register for a given pixel clock rate. The code which performs this calculation is overly complicated and includes an error estimation routine that doesn't work most of the time anyway. Replace the code with the simpler routine that's currently used on the P1022DS. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
To ensure that the DIU pixel clock will not be set to an invalid value, clamp the PXCLK divider to the allowed range (2-255). This also acts as a limiter for the pixel clock. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Scott Wood 提交于
e500mc cannot doze or nap due to an erratum (as well as having a different mechanism than previous e500), but it has a "wait" instruction that is similar to doze. On 64-bit, due to the soft-irq-disable mechanism, the existing book3e_idle should be used instead. Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
The platform file for the Freecale P1022DS reference board is not freeing the ioremap() mapping of the PIXIS and global utilities nodes it creates. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Ashish Kalra 提交于
The Freescale ePAPR reference hypervisor provides interrupt controller services via a hypercall interface, instead of emulating the MPIC controller. This is called the VMPIC. The ePAPR "virtual interrupt controller" provides interrupt controller services for external interrupts. External interrupts received by a partition can come from two sources: - Hardware interrupts - hardware interrupts come from external interrupt lines or on-chip I/O devices. - Virtual interrupts - virtual interrupts are generated by the hypervisor as part of some hypervisor service or hypervisor-created virtual device. Both types of interrupts are processed using the same programming model and same set of hypercalls. Signed-off-by: NAshish Kalra <ashish.kalra@freescale.com> Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 23 6月, 2011 5 次提交
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由 Kumar Gala 提交于
Only 32-bit SoCs have a QUICC Engine so limit the config option to PPC32. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Roy Zang 提交于
The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Scott Wood 提交于
In cases like when the platform is used under hypervisor we will NOT have an MPIC controller but still want doorbells setup. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Several changes on PCIe support on P3041DS/P4080DS/P5020DS boards: * Add support for "fsl,qoriq-pcie-v2.2" needed by P3041 & P5020 * Removed support for setting primary_phb_addr as we have no ISA need * Add PCI controller to of_platform_bus_probe (for EDAC) * Cleanup building w/SWIOTLB off on P4080DS (not stricly PCIe related) Signed-off-by: NKai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: NLaurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 20 6月, 2011 1 次提交
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由 Paul Mackerras 提交于
On many platforms (including pSeries), smp_ops->message_pass is always smp_muxed_ipi_message_pass. This changes arch/powerpc/kernel/smp.c so that if smp_ops->message_pass is NULL, it calls smp_muxed_ipi_message_pass directly. This means that a platform doesn't need to set both .message_pass and .cause_ipi, only one of them. It is a slight performance improvement in that it gets rid of an indirect function call at the expense of a predictable conditional branch. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 31 5月, 2011 1 次提交
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由 Benjamin Herrenschmidt 提交于
The Apple custom PIC only exist in some earlier machine models, anything with an MPIC will crash on suspend if we register those syscore ops unconditionally. This is a regression caused by commit f5a592f7 ("PM / PowerPC: Use struct syscore_ops instead of sysdevs for PM") Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 5月, 2011 3 次提交
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由 Rupjyoti Sarmah 提交于
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex. Signed-off-by: NRupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: NTirumala R Marri <tmarri@apm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Rename functions and arguments to reflect current usage. iic_cause_ipi becomes iic_message_pass and iic_ipi_to_irq becomes iic_msg_to_irq, and iic_request_ipi now takes a message (msg) instead of an ipi number. Also mesg is renamed to msg. Commit f1072939 (powerpc: Remove checks for MSG_ALL and MSG_ALL_BUT_SELF) connected the smp_message_pass hook for cell to the underlying iic_cause_IPI, a platform unique name. Later 23d72bfd (powerpc: Consolidate ipi message mux and demux) added a cause_ipi hook to the smp_ops, also used in message passing, but for controllers that can not send 4 unique messages and require multiplexing. It is even more confusing that the both take two arguments, but one is the small message ordinal and the other is an opaque long data associated with the cpu. Since cell iic maps messages one to one to ipi irqs, rename the function and argument to translate from ipi to message. Also make it clear that iic_request_ipi takes a message number as the argument for which ipi to create and request. No functionional change, just renames to avoid future confusion. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
The cell iic interrupt controller has enough software caused interrupts to use a unique interrupt for each of the 4 messages powerpc uses. This means each interrupt gets its own irq action/data combination. Use the seperate, optimized, arch common ipi action functions registered via the helper smp_request_message_ipi instead passing the message as action data to a single action that then demultipexes to the required acton via a switch statement. smp_request_message_ipi will register the action as IRQF_PER_CPU and IRQF_DISABLED, and WARN if the allocation fails for some reason, so no need to print on that failure. It will return positive if the message will not be used by the kernel, in which case we can free the virq. In addition to elimiating inefficient code, this also corrects the error that a kernel built with kexec but without a debugger would not register the ipi for kdump to notify the other cpus of a crash. This also restores the debugger action to be static to kernel/smp.c. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 19 5月, 2011 18 次提交
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由 Milton Miller 提交于
When using a property refering to the availibily of dynamic dma windows call it ddw_avail not ddr_avail. dupe_ddw_if_already_created does not dupilcate anything, it only finds and reuses the windows we already created, so rename it to find_existing_ddw. Also, it does not need the pci device node, so remove that argument. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Move the discovery of windows previously setup from when the pci driver calls set_dma_mask to an arch_initcall. When kexecing into a kernel with dynamic dma windows allocated, we need to find the windows early so that memory hot remove will be able to delete the tces mapping the to be removed memory and memory hotplug add will map the new memory into the window. We should not wait for the driver to be loaded and the device to be probed. The iommu init hooks are before kmalloc is setup, so defer to arch_initcall. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
If we destroy the window, we need to remove the property recording that we setup the window. Otherwise the next kernel we kexec will be confused. Also we should remove the property if even if we don't find the ibm,ddw-applicable window or if one of the property sizes is unexpected; presumably these came from a prior kernel via kexec, and we will not be maintaining the window with respect to memory hotplug. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Do not check dma supported until we have chosen the right dma ops. Check that the device is pci before treating it as such. Check the mask is supported by the selected dma ops before committing it. We only need to set iommu ops if it is not the current ops; this avoids searching the tree for the iommu table unnecessarily. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Nishanth Aravamudan 提交于
Otherwise we get silent truncations. Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Cc: Anton Blanchard <anton@samba.org> Cc: Milton Miller <miltonm@bga.com> Cc: linuxppc-dev@ozlabs.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Timur Tabi 提交于
If the video mode is set to 16-, 24-, or 32-bit pixels, then the pixel data contains actual levels of red, blue, and green. However, if the video mode is set to 8-bit pixels, then the 8-bit value represents an index into color table. This is called "palette mode" on the Freescale DIU video controller. The DIU driver does not currently support palette mode, but the MPC8610 HPCD board file returned a non-zero (although incorrect) pixel format value for 8-bit mode. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Geert Uytterhoeven 提交于
It may trigger a warning in fs/proc/generic.c:__xlate_proc_name() when trying to add an entry for the interrupt handler to sysfs. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Milton Miller 提交于
Instead of checking for rogue msi numbers via the irq_map host field set the chip_data to h.host_data (which is the msic struct pointer) at map and compare it in get_irq. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Building on Grant's efforts to remove the irq_map array, this patch moves spider-pics use of virq_to_host() to use irq_data_get_chip_data and sets the irq chip data in the map call, like most other interrupt controllers in powerpc. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
It was called from irq_create_mapping if that was called for a host and hwirq that was previously mapped, "to update the flags". But the only implementation was in beat_interrupt and all it did was repeat a hypervisor call without error checking that was performed with error checking at the beginning of the map hook. In addition, the comment on the beat remap hook says it will only called once for a given mapping, which would apply to map not remap. All flags should be known by the time the match hook is called, before we call the map hook. Removing this mostly unused hook will simpify the requirements of irq_domain concept. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Create a dummy irq_host using the generic dummy irq chip for the secondary cpus to use. Create a direct irq mapping for the ipi and register the ipi action handler against it. If for some unlikely reason part of this fails then don't detect the secondary cpus. This removes another instance of NO_IRQ_IGNORE, records the ipi stats for the secondary cpus, and runs the ipi on the interrupt stack. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
If none of irq category bits were set mpc52xx_get_irq() would pass NO_IRQ_IGNORE (-1) to irq_linear_revmap, which does an unsigned compare and declares the interrupt above the linear map range. It then punts to irq_find_mapping, which performs a linear search of all irqs, which will likely miss and only then return NO_IRQ. If no status bit is set, then we should return NO_IRQ directly. The interrupt should not be suppressed from spurious counting, in fact that is the definition of supurious. Signed-off-by: NMilton Miller <miltonm@bga.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
As NO_IRQ_IGNORE is only used between the static function cpld_pic_get_irq and its caller cpld_pic_cascade, and cpld_pic_cascade only uses it to suppress calling handle_generic_irq, we can change these uses to NO_IRQ and remove the extra tests and pathlength in cpld_pic_cascade. Signed-off-by: NMilton Miller <miltonm@bga.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
These all just clear chip or chipdata fields, which will be done by the generic code when we call irq_free_descs. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Compile the new smp ipi mux and demux code only if a platform will make use of it. The new config is selected as required. The new cause_ipi smp op is only available conditionally to point out configs where the select is required; this makes setting the op an immediate fail instead of a deferred unresolved symbol at link. This also creates a new config for power surge powermac upgrade support that can be disabled in expert mode but is default on. I also removed the depends / default y on CONFIG_XICS since it is selected by PSERIES. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Consolidate the mux and demux of ipi messages into smp.c and call a new smp_ops callback to actually trigger the ipi. The powerpc architecture code is optimised for having 4 distinct ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi single, scheduler ipi, and enter debugger). However, several interrupt controllers only provide a single software triggered interrupt that can be delivered to each cpu. To resolve this limitation, each smp_ops implementation created a per-cpu variable that is manipulated with atomic bitops. Since these lines will be contended they are optimialy marked as shared_aligned and take a full cache line for each cpu. Distro kernels may have 2 or 3 of these in their config, each taking per-cpu space even though at most one will be in use. This consolidation removes smp_message_recv and replaces the single call actions cases with direct calls from the common message recognition loop. The complicated debugger ipi case with its muxed crash handling code is moved to debug_ipi_action which is now called from the demux code (instead of the multi-message action calling smp_message_recv). I put a call to reschedule_action to increase the likelyhood of correctly merging the anticipated scheduler_ipi() hook coming from the scheduler tree; that single required call can be inlined later. The actual message decode is a copy of the old pseries xics code with its memory barriers and cache line spacing, augmented with a per-cpu unsigned long based on the book-e doorbell code. The optional data is set via a callback from the implementation and is passed to the new cause-ipi hook along with the logical cpu number. While currently only the doorbell implemntation uses this data it should be almost zero cost to retrieve and pass it -- it adds a single register load for the argument from the same cache line to which we just completed a store and the register is dead on return from the call. I extended the data element from unsigned int to unsigned long in case some other code wanted to associate a pointer. The doorbell check_self is replaced by a call to smp_muxed_ipi_resend, conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed to CONFIG_SMP but I left it with BOOKE for now. Also, the doorbell interrupt vector for book-e was not calling irq_enter and irq_exit, which throws off cpu accounting and causes code to not realize it is running in interrupt context. Add the missing calls. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
I have no idea if the beat hypervisor supports multiple cpus in a partition, but the code has not been touched since these stubs were added in February of 2007 except to move them in April of 2008. These are stubs: start_cpu always returns fail (which is dropped), the message passing and reciving are empty functions, and the top of file comment says "Incomplete". Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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