- 26 11月, 2009 24 次提交
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由 Sneha Narnakaje 提交于
This patch updates the NAND driver platform data to use 4-bit ECC and the ECC_HW/ECC_HW_OOB_FIRST modes. Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sneha Narnakaje 提交于
This patch updates the NAND driver platform data to use 4-bit ECC and the ECC_HW/ECC_HW_OOB_FIRST modes. Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sandeep Paulraj 提交于
The edma_alloc_cont_slots API is used for obtaining a set of contiguous slots. When we use the "_ANY" option with this API, by definition of this option it is suppossed to start looking for a set of contiguous slots starting from slot 64 for DaVinci SOC's and 32 for DA8xx SOC's. This has been explained in the API description in the driver itself. So when we use the "_ANY" option with this API, the slot number passed as an argument should be a "don't care". This patch takes care of this condition mentioned above. When checking to see if the starting slot is a valid number, it checks to make sure that the "_ANY" option is not used. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sandeep Paulraj 提交于
In the edma_free_cont_slots API, the variable slot was being modified and then used in the for loop. This results in incorrect behaviour when the API is used. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sudhakar Rajashekhara 提交于
On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin number of LCD panel power has changed. This patch takes care of this change. Software will support only Beta versions of DA850/OMAP-L138 EVM. In the process, add the missing entry for data pin 0 and remove the GPIO specific pins from da850_lcdcntl_pins structure. EVM specific muxing for LCD is being done in the board file now. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
Add RTC support for the da830/omap-l137 and da850/omap-l138 SoC's by leveraging existing the rtc-omap driver. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Steve Chen 提交于
Add graphics support for the Sharp LCD035Q3DG01 graphical LCD that's on the User Interface (UI) daughter card of the DA830/OMAP-L137 EVM. The LCD shares EMIFA lines with the NAND and NOR devices that are also on the UI card so those lines are shared via a couple of muxes. The muxes are controlled by the 'MUX_MODE' line on the UI card. The 'MUX_MODE' line is controlled by pin P6 of a pcf8574 i2c expander that's at i2c address 0x3f on UI card. The i2c expander is controlled using the gpio infrastructure from the board code using the 'setup()' and 'teardown()' routines. Signed-off-by: NSteve Chen <schen@mvista.com> Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
Add support for the Sharp LCD035Q3DG01 graphical LCD. This requires a minor interface change to da8xx_register_lcdc() so that the board code can pass in the platform_data which describes the lcd controller that's to be used. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 David A. Griego 提交于
Add pinmux settings, etc. to enable the MMC/SC hardware. Signed-off-by: NDavid A. Griego <dgriego@mvista.com> Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Hemant Pedanekar 提交于
DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'. This path adds entry for the same in dm646x_ids to be able to boot on boards with 3.x revision chips. Also modifies name for 'variant=0' (revisions 1.0, 1.1). Signed-off-by: NHemant Pedanekar <hemantp@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2 and PLL0 SYSCLK2. Having Async3 source from PLL1 SYSCLK2 allows peripherals on that domain to remain unaffected by frequency scaling on PLL0. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
The clk_set_parent() API is implemented to enable re-parenting clocks in the clock tree. This is useful in DVFS and helps by shifting clocks to an asynchronous domain where supported by hardware Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
clk_round_rate, clk_set_rate have been updated to handle dynamic frequency changes. The motivation behind the changes is to support dynamic CPU frequency change. davinci_set_pllrate() changes the PLL rate of a given PLL. This function has been presented as a generic function though it has been tested only on OMAP-L138 EVM. No other currently available DaVinci device will probably use this function, but any future device specific changes will hopefully be small enough to get taken care using a cpu_is_xxx() macro. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Make clock rate recalculation easy by having a re-calculate function for each clock. The existing functions for calculation of output rates of PLL and PLL-derived sysclks have been convered to the new re-calculate API. A new function is introduced to take care of rate (re)calculation for leaf clocks. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Achieve easy top down traversal of clock tree by keeping track of each clock's list of children. This is useful in supporting DVFS where clock rates of all children need to be updated in an efficient manner. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
This makes it clear that JTAG ID register is part of the SYSCFG module Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line with the public documentation for these parts. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
The DA830/OMAP-L137 EVM cannot use the default pinmux setup for McASP1 so put the correct settings in the board file for that platform. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
For consistency with existing code, change the name of da8xx_init_mcasp() to da8xx_register_mcasp(). Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
Some mcasp code was inserted between the emac resource setup and the related register routine that registers the emac. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Miguel Aguilar 提交于
1) Registers the platform device for McBSP on dm365. 2) Add platform data to DM365 EVM board file. 3) Set i2c address for audio codec at DM365 EVM board file. Signed-off-by: NMiguel Aguilar <miguel.aguilar@ridgerun.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sandeep Paulraj 提交于
The parent clock for the USB source clock is actually PLL1 aux clock, not PLL2 sysclk1. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Phaneendra Kumar 提交于
This patch fixes a typo/bug in the DM365 SDIO interrupt assignment Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 19 11月, 2009 2 次提交
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由 Roel Kluin 提交于
The index `cs' is signed, test whether it is negative before we release gpmc_cs_mem[cs]. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
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由 Roel Kluin 提交于
The closing parenthesis was not in the right location. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
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- 18 11月, 2009 2 次提交
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由 Tero Kristo 提交于
Current calculation does not take into account any changes to M2 divisor, and thus when we change VDD2 OPP, dpll3_m2x2 rate does not change. Fixed by re-routing dpll3_m2x2 parent to dpll3_m2. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Rajendra Nayak 提交于
Fix the freqsel value computation. Use n instead of (n+1) The formula in the TRM uses a zero-based N, hence the (n+1); however at this point in the clock34xx.c code, N is one-based. Hayati Bayrakdar <h-bayrakdar@ti.com> and Nishanth Menon <nm@ti.com> helped track down this bug. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> [paul@pwsan.com: modified commit message] Cc: Hayati Bayrakdar <h-bayrakdar@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 11月, 2009 4 次提交
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由 Vimal Singh 提交于
Interpretation of 'row' and 'col' got reversed in matrix keymap framework. Also last element '0', present in keymap array, is no more needed. Correcting zoom2 keyboard keymap accordingly. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roel Kluin 提交于
Ensure we do not read/write outside array boundaries with a negative index. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Paul Parsons 提交于
hx4700 touchscreen events were being dropped in ads7846_rx() because their pressure values consistently exceeded the platform maximum of 512; a sample of 256 pressure values were in the range 531 to 815. Doubling the platform maximum to 1024 allows hx4700 touchscreen events to pass the test. Signed-off-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Linus Walleij 提交于
This will fix some small issues with the COH 901 331 RTC driver: - Interrupt is disabled after alarm so that we don't fire multiple interrupts. - We return 0 from the coh901331_alarm_irq_enable() ridding a compile warning. - We alter the name in the U300 device registry to match that of the driver so they sucessfully resolve. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 11月, 2009 1 次提交
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由 Nicolas Ferre 提交于
at91sam9g20ek rev. C and onwards embed two SD/MMC slots. This patch modify the previous dual slot board definition to match the official rev. C board. It also allows the use of at91_mci SD/MMC driver in addition to the atmel-mci one. Some pins have been re-affected from leds or Ethernet phy IRQ to the SD/MMC slot A. This lead to a modification of those definitions. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NAndrew Victor <linux@maxim.org.za>
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- 14 11月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
Disable propagation of mbus errors to the CPU local bus, as this causes mbus errors (which can occur for example for PCI aborts) to throw CPU aborts, which we're not set up to deal with. Reported-by: NDieter Kiermaier <dk-arm-linux@gmx.de> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 13 11月, 2009 4 次提交
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由 Eric Miao 提交于
Since MFP_PIN_GPIO* now includes 128-255, mfp_to_gpio() is no longer valid for those additional pins, fix it. Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marek Vasut 提交于
The AC97 part wasn't initialized on Colibri/PXA320 because the macros were wrong. Also, the code didn't compile because of a header file not being included. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Roel Kluin 提交于
Underscores were missing. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marc Zyngier 提交于
Commit d2c37068 ([ARM] pxa: initialize default interrupt priority and use ICHP for IRQ handling) broke ISA interrupt support on pxa27x/3xx. In such a case, PXA_IRQ(0) != 0, and the IRQ number computed from ICHP must be offset by PXA_IRQ(0). Tested on an Arcom Zeus (pxa270), with both CONFIG_PXA_HAVE_ISA_IRQS enabled and disabled. Signed-off-by: NMarc Zyngier <maz@misterjones.org> Tested-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 12 11月, 2009 2 次提交
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由 Mike Turquette 提交于
Adjust OMAP3 frequency transition latency from 10,000,000uS to a more reasonable 300,000uS. This causes ondemand and conservative governors to sample CPU load more often resulting in more responsive behavior. Tested on Android 2.6.29; using this value and conservative governor, CORE power consumption on Zoom2 was comparable to the old and unresponsive 10,000,000uS value while UI responsiveness was greatly improved. Signed-off-by: NMike Turquette <mturquette@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Grazvydas Ignotas 提交于
This patch updates defconfig to enable options needed to properly boot OMAP3 pandora board. It also enables MMC, OTG, GPIO LEDs, TWL4030 GPIO and sound drivers. Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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