The event numbering changed between revision r0 and r1 of the CCI
PMU. Expose this to userspace to allow tooling to handle the
differences in event numbers.
Suggested-by: NDrew Richardson <Drew.Richardson@arm.com>
Signed-off-by: NPunit Agrawal <punit.agrawal@arm.com>
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The driver queries the CCI IP revision to distinguish between r0 and r1
scheme for event numbers and currently supports upto version r1p2. To
minimise code churn every time there's a new version of the IP, assume
that event numbering doesn't change for revisions > r1p0 (which is
the case).

The driver will still need an update for future revisions that change
the event numbers.
Signed-off-by: NPunit Agrawal <punit.agrawal@arm.com>
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Merge tag 'qcom-drivers-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/drivers

Merge "qcom driver changes for v3.15" from Kumar Gala:

We've split Qualcomm MSM support into legacy and multiplatform.  These
drivers are only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.

* tag 'qcom-drivers-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
  gpio: msm: switch Kconfig to ARCH_QCOM depends
  hwrng: msm: switch Kconfig to ARCH_QCOM depends
  power: reset: msm - switch Kconfig to ARCH_QCOM depends
  drm/msm: drop ARCH_MSM Kconfig depend
  tty: serial: msm: Enable building msm_serial for ARCH_QCOM

* qcom/cleanup:
  ARM: qcom: Rename various msm prefixed functions to qcom
  clocksource: qcom: split building of legacy vs multiplatform support
  ARM: qcom: Split Qualcomm support into legacy and multiplatform
  clocksource: qcom: Move clocksource code out of mach-msm
  ARM: msm: kill off hotplug.c
  ARM: msm: Remove pen_release usage
  ARM: dts: msm: split out msm8660 and msm8960 soc into dts include

This cleanup branch is a dependency for the following qcom driver changes.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

vic_init_cascaded is called by integrator impd1 code that can
be a loadable module, so the function has to be exported.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

mvebu watchdog driver changes for v3.15

 - orion watchdog
    - cleanup and extend driver to support Armada 370 and Armada XP

Depends:
 - tags/irqchip-mvebu-fixes-3.14 (already pulled by tglx)
    - both are based on v3.14-rc1

* tag 'mvebu-watchdog-3.15' of git://git.infradead.org/linux-mvebu:
  watchdog: orion: Enable the build on ARCH_MVEBU
  watchdog: orion: Add support for Armada 370 and Armada XP SoC
  watchdog: orion: Add per-compatible watchdog start implementation
  watchdog: orion: Add per-compatible clock initialization
  watchdog: orion: Introduce per-compatible of_device_id data
  watchdog: orion: Introduce an orion_watchdog device structure
  watchdog: orion: Remove unneeded BRIDGE_CAUSE clear
  watchdog: orion: Make RSTOUT register a separate resource
  watchdog: orion: Handle the interrupt so it's properly acked
  watchdog: orion: Make sure the watchdog is initially stopped
  watchdog: orion: Remove unused macros
  watchdog: orion: Use atomic access for shared registers
  watchdog: orion: Add clock error handling
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

irqchip mvebu fixes for v3.14

 - orion:
    - fixes for clearing bridge cause register, and clearing stale interrupts

* tag 'irqchip-mvebu-fixes-3.14' of git://git.infradead.org/linux-mvebu:
  irqchip: orion: Fix getting generic chip pointer.
  irqchip: orion: clear stale interrupts in irq_startup
  irqchip: orion: use handle_edge_irq on bridge irqs
  irqchip: orion: clear bridge cause register on init

This is a dependency for the mvebu watchdog changes.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Merge tag 'davinci-for-v3.15/nand' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers

A patch to break dependency of DaVinci NAND
driver with mach-davinci. Required for reuse
of driver on other platforms (keystone).

* tag 'davinci-for-v3.15/nand' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: aemif: get rid of davinci-nand driver dependency on aemif
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

We've split Qualcomm MSM support into legacy and multiplatform.  The gpio
msm-v2 driver is only relevant on the multiplatform supported SoCs so
switch the Kconfig depends to ARCH_QCOM.

CC: Linus Walleij <linus.walleij@linaro.org>
Acked-by: NAlexandre Courbot <gnurou@gmail.com>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

The problem that the set timings code contains the call of Davinci
platform function davinci_aemif_setup_timing() which is not
accessible if kernel is built for another platform like Keystone.

The Keysone platform is going to use TI AEMIF driver.
If TI AEMIF is used we don't need to set timings and bus width.
It is done by AEMIF driver.

To get rid of davinci-nand driver dependency on aemif platform code
we moved aemif code to davinci platform.

The platform AEMIF code (aemif.c) has to be removed once Davinci
will be converted to DT and use ti-aemif.c driver.
Acked-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[nsekhar@ti.com: fixed checkpatch error and a build breakage due to
		 missing include, rebased onto l2-mtd/master]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

After adding support for Armada 370/XP SoC let's enable the build on
these platforms.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Using the added infrastructure for handling SoC differences,
this commit adds support for the watchdog controller available
in Armada 370 and Armada XP SoCs.

Also, and because the AXP clock initialization uses of_clk_get_by_name,
this commit changes the orion clock initialization to use clk_get() and
adds a proper clk_put() on the common exit/error paths.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

To handle differences between SoCs this commit adds per-compatible
string start() function for the watchdog kick-off. This is preparation
work and makes no functionality changes to the current driver.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Following the introduction of the compatible-data field,
it's now possible to further abstract the clock initialization.
This will allow to support SoC with a different clock setup.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This commit adds an orion_watchdog_data structure to hold compatible-data
information. This allows to remove the driver-wide definition and to
be able to add support for multiple compatible-strings in the future.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

In order to prepare to support multiple compatible-strings, this
commit adds a device structure to hold the driver's state.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

After adding the IRQ request, the BRIDGE_CAUSE bit should be cleared by the
bridge interrupt controller. There's no longer a need to do it in the watchdog
driver, so we can simply remove it.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

In order to support other SoC, it's required to distinguish
the 'control' timer register, from the 'rstout' register
that enables system reset on watchdog expiration.

To prevent a compatibility break, this commit adds a fallback
to a hardcoded RSTOUT address.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

DT-enabled plaforms, where the irqchip driver for the brigde interrupt
controller is available, can handle the watchdog IRQ properly. Therefore,
request the interrupt and add a dummy handler that merely calls panic().

This is done in order to have an initial 'ack' of the interruption,
which clears the watchdog state.

Furthermore, since some platforms don't have such IRQ, this commit
makes the interrupt specification optional.
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Having the watchdog initially fully stopped is important to avoid
any spurious watchdog triggers, in case the registers are not in
its reset state.

If the watchdog rstout is enabled and the watchdog counter running,
this initial stop is not performed, to comply with the 'nowayout'
parameter.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

These are not used anywhere so it's safe to remove them.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Since the timer control register is shared with the clocksource driver,
use the recently introduced atomic_io_clear_set() to access such register.
Given the watchdog core already provides serialization for all the
watchdog ops, this commit allows to remove the spinlock entirely.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This commit adds a check for clk_prepare_enable success and introduces
an error path to disable the clock properly.
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: NWilly Tarreau <w@1wt.eu>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>
Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Merge tag 'integrator-for-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers

Merge "Integrator/Versatile base patch stack for the v3.15 series"
from Linus Walleij:

"this is a set of patches I have sent for review and failed to get ACKs
from the proper subsystem maintainers after repeated pings. However I
now need to have this rotated in linux-next as a base for multiplatform,
so please pull it in, it is all ARM drivers anyway. Russell pointed out
some things and these have been fixed and iterated in this series."

- Move integrator clock definitions to the device tree, alter
  clock and timer drivers accordingly.

- Alter the VIC irqchip driver to support cascaded VICs off
  a parent IRQ controller.

- Update the IM-PD1 plugin code to use managed resources.

- Register the VIC on the IM-PD1.

- Select the PL061 GPIO block for the IM-PD1 on the
  Integrator/AP.

* tag 'integrator-for-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: integrator: select GPIO block
  ARM: integrator: register the IM-PD1 VIC
  ARM: integrator: use managed resources for the IM-PD1
  irqchip: support cascaded VICs
  irqchip: vic: update the base IRQ member correctly
  clk: versatile: respect parent rate in ICST clock
  clk: versatile: pass a parent to the ICST clock
  ARM: integrator: switch to fetch clocks from device tree
  ARM: SP804: make Integrator/CP timer pick clock from DT
  ARM: integrator: define clocks in the device trees
Signed-off-by: NOlof Johansson <olof@lixom.net>

Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes: 9dbd90f1 ("irqchip: Add support for Marvell Orion SoCs")
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

We've split Qualcomm MSM support into legacy and multiplatform.  The RNG
driver is only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
Acked-by: NHerbert Xu <herbert@gondor.apana.org.au>
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

Merge tag 'renesas-soc-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Merge "Renesas ARM Based SoC Updates for v3.15" from Simon Horman:

* r7s72100 SoC (RZ/A1H)
  - Add i2c clocks (portion missing from previous patch due to miss-merge)

* r8a7791 (R-Car M2)
  - Add SATA clocks
  - Add ZS clock
  - Wait for status on all MSTP clocks
 -- Add I2C and VIN clocks

* r8a7790 (R-Car H2)
  - Add PCI USB host clock support
  - Add Audio DMAC, SATA and VIN clocks
  - Add Audio DMAC support

* r8a7779 (R-Car H1)
  - Wait for status on selected MSTP clocks

* tag 'renesas-soc-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Add PCI USB host clock support
  ARM: shmobile: r7s72100: really add i2c clocks
  ARM: shmobile: r8a7791: Add SATA clocks
  ARM: shmobile: r8a7791: Add ZS clock
  ARM: shmobile: r8a7790: Add SATA clocks
  ARM: shmobile: r8a7790: Add VIN clock support
  ARM: shmobile: r8a7790: add Audio DMAC support
  ARM: shmobile: r8a7790: add Audio DMAC clock
  ARM: shmobile: r8a7791: Wait for status on all MSTP clocks
  ARM: shmobile: r8a7791: Add VIN clocks
  ARM: shmobile: r8a7791: Add I2C clocks
  ARM: shmobile: r8a7790: Wait for status on all MSTP clocks
  ARM: shmobile: r8a7779: Wait for status on selected MSTP clocks
  ARM: shmobile: wait for MSTP clock status to toggle, when enabling it

Pull ext4 fixes from Ted Ts'o:
 "Miscellaneous ext4 bug fixes for v3.14"

* tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
  jbd2: fix use after free in jbd2_journal_start_reserved()
  ext4: don't leave i_crtime.tv_sec uninitialized
  ext4: fix online resize with a non-standard blocks per group setting
  ext4: fix online resize with very large inode tables
  ext4: don't try to modify s_flags if the the file system is read-only
  ext4: fix error paths in swap_inode_boot_loader()
  ext4: fix xfstest generic/299 block validity failures

If start_this_handle() fails then it leads to a use after free of
"handle".
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: N"Theodore Ts'o" <tytso@mit.edu>
Cc: stable@vger.kernel.org

Pull Ceph fixes from Sage Weil:
 "We have some patches fixing up ACL support issues from Zheng and
  Guangliang and a mount option to enable/disable this support.  (These
  fixes were somewhat delayed by the Chinese holiday.)

  There is also a small fix for cached readdir handling when directories
  are fragmented"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client:
  ceph: fix __dcache_readdir()
  ceph: add acl, noacl options for cephfs mount
  ceph: make ceph_forget_all_cached_acls() static inline
  ceph: add missing init_acl() for mkdir() and atomic_open()
  ceph: fix ceph_set_acl()
  ceph: fix ceph_removexattr()
  ceph: remove xattr when null value is given to setxattr()
  ceph: properly handle XATTR_CREATE and XATTR_REPLACE

Pull CIFS fixes from Steve French:
 "Three cifs fixes, the most important fixing the problem with passing
  bogus pointers with writev (CVE-2014-0069).

  Two additional cifs fixes are still in review (including the fix for
  an append problem which Al also discovered)"

* 'for-linus' of git://git.samba.org/sfrench/cifs-2.6:
  CIFS: Fix too big maxBuf size for SMB3 mounts
  cifs: ensure that uncached writes handle unmapped areas correctly
  [CIFS] Fix cifsacl mounts over smb2 to not call cifs

When FS-Cache allocates an object, the following sequence of events can
occur:

 -->fscache_alloc_object()
    -->cachefiles_alloc_object() [via cache->ops->alloc_object]
    <--[returns new object]
    -->fscache_attach_object()
    <--[failed]
    -->cachefiles_put_object() [via cache->ops->put_object]
       -->fscache_object_destroy()
          -->fscache_objlist_remove()
             -->rb_erase() to remove the object from fscache_object_list.

resulting in a crash in the rbtree code.

The problem is that the object is only added to fscache_object_list on
the success path of fscache_attach_object() where it calls
fscache_objlist_add().

So if fscache_attach_object() fails, the object won't have been added to
the objlist rbtree.  We do, however, unconditionally try to remove the
object from the tree.

Thanks to NeilBrown for finding this and suggesting this solution.
Reported-by: NNeilBrown <neilb@suse.de>
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Tested-by: N(a customer of) NeilBrown <neilb@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This has been this way for years, and every time I stumble across it I
lose my lunch.  After coming across it for the nth time in the Coverity
results, I had to overcome the bystander effect and do something about
it.

This ignores the 79 column limit in favor of making it look like C
instead of gibberish.

The correct thing to do here would be to lose some of the indentation by
breaking this function up into several smaller ones.  I might do that at
some point if I have the stomach to look at this again.

(Also some of those overlong ternary operations would likely be more
readable as regular if's)
Signed-off-by: NDave Jones <davej@fedoraproject.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Pull dma-buf fix from Sumit Semwal:
 "Just some debugfs output updates.

  There's another patch related to dma-buf, but it'll get upstreamed via
  Greg KH's pull request"

* tag 'dma-buf-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sumits/dma-buf:
  dma-buf: update debugfs output

Pull AVR32 fixes from Hans-Christian Egtvedt.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/linux-avr32:
  avr32: add generic vga.h to Kbuild
  avr32: add generic ioremap_wc() definition in io.h
  avr32: Makefile: add '-D__linux__' flag for gcc-4.4.7 use
  avr32: fix missing module.h causing build failure in mimc200/fram.c

If directory is fragmented, readdir() read its dirfrags one by one.
After reading all dirfrags, the corresponding dentries are sorted in
(frag_t, off) order in the dcache. If dentries of a directory are all
cached, __dcache_readdir() can use the cached dentries to satisfy
readdir syscall. But when checking if a given dentry is after the
position of readdir, __dcache_readdir() compares numerical value of
frag_t directly. This is wrong, it should use ceph_frag_compare().
Signed-off-by: NYan, Zheng <zheng.z.yan@intel.com>

Make the 'acl' option dependent on having ACL support compiled in.  Make
the 'noacl' option work even without it so that one can always ask it to
be off and not error out on mount when it is not supported.
Signed-off-by: NGuangliang Zhao <lucienchao@gmail.com>
Signed-off-by: NSage Weil <sage@inktank.com>

Signed-off-by: NGuangliang Zhao <lucienchao@gmail.com>
Reviewed-by: NAlex Elder <elder@linaro.org>
Signed-off-by: NSage Weil <sage@inktank.com>

Signed-off-by: NYan, Zheng <zheng.z.yan@intel.com>

If acl is equivalent to file mode permission bits, ceph_set_acl()
needs to remove any existing acl xattr. Use __ceph_setxattr() to
handle both setting and removing acl xattr cases, it doesn't return
-ENODATA when there is no acl xattr.
Signed-off-by: NYan, Zheng <zheng.z.yan@intel.com>