1. 09 11月, 2012 1 次提交
    • W
      ARM: mm: introduce L_PTE_VALID for page table entries · dbf62d50
      Will Deacon 提交于
      For long-descriptor translation table formats, the ARMv7 architecture
      defines the last two bits of the second- and third-level descriptors to
      be:
      
      	x0b	- Invalid
      	01b	- Block (second-level), Reserved (third-level)
      	11b	- Table (second-level), Page (third-level)
      
      This allows us to define L_PTE_PRESENT as (3 << 0) and use this value to
      create ptes directly. However, when determining whether a given pte
      value is present in the low-level page table accessors, we only need to
      check the least significant bit of the descriptor, allowing us to write
      faulting, present entries which are required for PROT_NONE mappings.
      
      This patch introduces L_PTE_VALID, which can be used to test whether a
      pte should fault, and updates the low-level page table accessors
      accordingly.
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      dbf62d50
  2. 26 10月, 2012 1 次提交
  3. 25 10月, 2012 1 次提交
  4. 23 10月, 2012 1 次提交
    • M
      ARM: dma-mapping: support debug_dma_mapping_error · 871ae57a
      Ming Lei 提交于
      Without the patch, kind of below warning will be dumped if DMA-API
      debug is enabled:
      
      [   11.069763] ------------[ cut here ]------------
      [   11.074645] WARNING: at lib/dma-debug.c:948 check_unmap+0x770/0x860()
      [   11.081420] ehci-omap ehci-omap.0: DMA-API: device driver failed to
      check map error[device address=0x0000000
      0adb78e80] [size=8 bytes] [mapped as single]
      [   11.095611] Modules linked in:
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NMing Lei <ming.lei@canonical.com>
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      871ae57a
  5. 20 10月, 2012 4 次提交
  6. 13 10月, 2012 1 次提交
  7. 12 10月, 2012 1 次提交
  8. 10 10月, 2012 2 次提交
    • A
      ARM: warnings in arch/arm/include/asm/uaccess.h · 8e7fc18b
      Arnd Bergmann 提交于
      On NOMMU ARM, the __addr_ok() and __range_ok() macros do not evaluate
      their arguments, which may lead to harmless build warnings in some
      code where the variables are not used otherwise. Adding a cast to void
      gets rid of the warning and does not make any semantic changes.
      
      Without this patch, building at91x40_defconfig results in:
      
      fs/read_write.c: In function 'rw_copy_check_uvector':
      fs/read_write.c:684:9: warning: unused variable 'buf' [-Wunused-variable]
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NGreg Ungerer <gerg@uclinux.org>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      8e7fc18b
    • A
      ARM: binfmt_flat: unused variable 'persistent' · f6d5d8a5
      Arnd Bergmann 提交于
      The flat_get_addr_from_rp() macro does not use the 'persistent' argument
      on ARM, causing a harmless compiler warning. A cast to void removes
      that warning.
      
      Without this patch, building at91x40_defconfig results in:
      
      fs/binfmt_flat.c: In function 'load_flat_file':
      fs/binfmt_flat.c:746:17: warning: unused variable 'persistent' [-Wunused-variable]
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NGreg Ungerer <gerg@uclinux.org>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Bryan Wu <bryan.wu@canonical.com>
      f6d5d8a5
  9. 09 10月, 2012 2 次提交
  10. 05 10月, 2012 1 次提交
    • W
      ARM: 7548/1: include linux/sched.h in syscall.h · 8ef102c6
      Wade Farnsworth 提交于
      The syscall tracing patch introduces a compile bug in lttng-modules
      when the latter calls syscall_get_nr(), similar to the following:
      
      <path-to-linux>/arch/arm/include/asm/syscall.h:21:2: error: implicit declaration of function 'task_thread_info' [-Werror=implicit-function-declaration]
      
      The issue is that we are using task_thread_info() in the
      syscall_get_nr() function in asm/syscall.h, but not explicitly
      including sched.h from this file, so we can expect this bug might
      surface any time that syscall_get_nr() is called.
      
      Explicitly including sched.h solves the problem.
      
      Cc: <stable@vger.kernel.org> [3.5, 3.6]
      Signed-off-by: NWade Farnsworth <wade_farnsworth@mentor.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8ef102c6
  11. 03 10月, 2012 2 次提交
  12. 02 10月, 2012 2 次提交
    • R
      ARM: kill off arch_is_coherent · 48aa820f
      Rob Herring 提交于
      With ixp2xxx removed, there are no platforms that define arch_is_coherent,
      so the last occurrences of arch_is_coherent can be removed. Any new
      platform with coherent i/o should use coherent dma mapping functions.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      48aa820f
    • R
      ARM: add coherent dma ops · dd37e940
      Rob Herring 提交于
      arch_is_coherent is problematic as it is a global symbol. This
      doesn't work for multi-platform kernels or platforms which can support
      per device coherent DMA.
      
      This adds arm_coherent_dma_ops to be used for devices which connected
      coherently (i.e. to the ACP port on Cortex-A9 or A15). The arm_dma_ops
      are modified at boot when arch_is_coherent is true.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      dd37e940
  13. 01 10月, 2012 5 次提交
  14. 28 9月, 2012 1 次提交
    • D
      Make most arch asm/module.h files use asm-generic/module.h · 786d35d4
      David Howells 提交于
      Use the mapping of Elf_[SPE]hdr, Elf_Addr, Elf_Sym, Elf_Dyn, Elf_Rel/Rela,
      ELF_R_TYPE() and ELF_R_SYM() to either the 32-bit version or the 64-bit version
      into asm-generic/module.h for all arches bar MIPS.
      
      Also, use the generic definition mod_arch_specific where possible.
      
      To this end, I've defined three new config bools:
      
       (*) HAVE_MOD_ARCH_SPECIFIC
      
           Arches define this if they don't want to use the empty generic
           mod_arch_specific struct.
      
       (*) MODULES_USE_ELF_RELA
      
           Arches define this if their modules can contain RELA records.  This causes
           the Elf_Rela mapping to be emitted and allows apply_relocate_add() to be
           defined by the arch rather than have the core emit an error message.
      
       (*) MODULES_USE_ELF_REL
      
           Arches define this if their modules can contain REL records.  This causes
           the Elf_Rel mapping to be emitted and allows apply_relocate() to be
           defined by the arch rather than have the core emit an error message.
      
      Note that it is possible to allow both REL and RELA records: m68k and mips are
      two arches that do this.
      
      With this, some arch asm/module.h files can be deleted entirely and replaced
      with a generic-y marker in the arch Kbuild file.
      
      Additionally, I have removed the bits from m32r and score that handle the
      unsupported type of relocation record as that's now handled centrally.
      Signed-off-by: NDavid Howells <dhowells@redhat.com>
      Acked-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      786d35d4
  15. 27 9月, 2012 1 次提交
  16. 25 9月, 2012 1 次提交
    • L
      ARM: mm: implement LoUIS API for cache maintenance ops · 031bd879
      Lorenzo Pieralisi 提交于
      ARM v7 architecture introduced the concept of cache levels and related
      control registers. New processors like A7 and A15 embed an L2 unified cache
      controller that becomes part of the cache level hierarchy. Some operations in
      the kernel like cpu_suspend and __cpu_disable do not require a flush of the
      entire cache hierarchy to DRAM but just the cache levels belonging to the
      Level of Unification Inner Shareable (LoUIS), which in most of ARM v7 systems
      correspond to L1.
      
      The current cache flushing API used in cpu_suspend and __cpu_disable,
      flush_cache_all(), ends up flushing the whole cache hierarchy since for
      v7 it cleans and invalidates all cache levels up to Level of Coherency
      (LoC) which cripples system performance when used in hot paths like hotplug
      and cpuidle.
      
      Therefore a new kernel cache maintenance API must be added to cope with
      latest ARM system requirements.
      
      This patch adds flush_cache_louis() to the ARM kernel cache maintenance API.
      
      This function cleans and invalidates all data cache levels up to the
      Level of Unification Inner Shareable (LoUIS) and invalidates the instruction
      cache for processors that support it (> v7).
      
      This patch also creates an alias of the cache LoUIS function to flush_kern_all
      for all processor versions prior to v7, so that the current cache flushing
      behaviour is unchanged for those processors.
      
      v7 cache maintenance code implements a cache LoUIS function that cleans and
      invalidates the D-cache up to LoUIS and invalidates the I-cache, according
      to the new API.
      Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Reviewed-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Tested-by: NShawn Guo <shawn.guo@linaro.org>
      031bd879
  17. 22 9月, 2012 1 次提交
  18. 20 9月, 2012 4 次提交
  19. 19 9月, 2012 3 次提交
  20. 16 9月, 2012 5 次提交
    • M
      ARM: 7522/1: arch_timers: register a time/cycle counter · a1b2dde7
      Marc Zyngier 提交于
      Some subsystems (KVM for example) need access to a cycle counter.
      In the KVM case, this is used to measure the time delta between
      host and guest in order to accurately generate timer events for
      the guest.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a1b2dde7
    • D
      ARM: 7511/1: opcodes: Opcode definitions for the Virtualization Extensions · 508514ed
      Dave Martin 提交于
      For now, this patch just adds a definition for the HVC instruction.
      More can be added here later, as needed.
      
      Now that we have a real example of how to use the opcode injection
      macros properly, this patch also adds a cross-reference from the
      explanation in opcodes.h (since without an example, figuring out
      how to use the macros is not that easy).
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      508514ed
    • D
      ARM: 7510/1: opcodes: Add helpers for emitting custom opcodes · a61a41a0
      Dave Martin 提交于
      This patch adds some __inst_() macros for injecting custom opcodes
      in assembler (both inline and in .S files).  They should make it
      easier and cleaner to get things right in little-/big-
      endian/ARM/Thumb-2 kernels without a lot of #ifdefs.
      
      This pure-preprocessor approach is preferred over the alternative
      method of wedging extra assembler directives into the assembler
      input using top-level asm() blocks, since there is no way to
      guarantee that the compiler won't reorder those with respect to
      each other or with respect to non-toplevel asm() blocks, unless
      -fno-toplevel-reorder is passed (which is in itself somewhat
      undesirable because it defeats some potential optimisations).
      
      Currently <asm/unified.h> _does_ silently rely on the compiler not
      reordering at the top level, but it seems better to avoid adding
      extra code which depends on this if the same result can be achieved
      in another way.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a61a41a0
    • D
      ARM: 7509/1: opcodes: Make opcode byteswapping macros assembly-compatible · 0ce3de23
      Dave Martin 提交于
      Most of the existing macros don't work with assembler, due to the
      use of type casts and C functions from <linux/swab.h>.
      
      This patch abstracts out those operations and provides simple
      explicit versions for use in assembly code.
      
      __opcode_is_thumb32() and __opcode_is_thumb16() are also converted
      to do bitmask-based testing to avoid confusion if these are used in
      assembly code (the assembler typically treats all arithmetic values
      as signed).
      
      These changes avoid the need for the compiler to pre-evaluate
      constant expressions used to generate opcodes.  By ensuring that
      the forms of these expressions can be evaluated directly by the
      assembler, we can just stringify the expressions directly into the
      asm during the preprocessing pass.  The alternative approach
      (passing the evaluated expression via an inline asm "i" constraint)
      gets painful because the contents of the asm and the constraints
      must be kept in sync.  This makes the resulting macros awkward to
      use.
      
      Retaining the C forms of the macros allows more efficient code to
      be generated when opcodes are generated programmatically at run-
      time, but there is no way to embed run-time-generated opcodes in
      asm() blocks.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      0ce3de23
    • D
      ARM: 7508/1: opcodes: Don't define the thumb32 byteswapping macros for BE32 · 57b9da32
      Dave Martin 提交于
      The existing __mem_to_opcode_thumb32() is incorrect for BE32
      platforms.  However, these don't support Thumb-2 kernels, so this
      option is not so relevant for those platforms anyway.
      
      This operation is complicated by the lack of unaligned memory
      access support prior to ARMv6.
      
      Rather than provide a "working" macro which will probably won't get
      used (or worse, will get misused), this patch removes the macro for
      BE32 kernels.  People manipulating Thumb opcodes prior to ARMv6
      should almost certainly be splitting these operations into
      halfwords anyway, using __opcode_thumb32_{first,second,compose}()
      and the 16-bit opcode transformations.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      57b9da32