- 18 7月, 2007 1 次提交
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由 Roland Dreier 提交于
Make some functions that are only used in a single .c file static. In addition to being a cleanup, this shrinks the generated code. On x86_64: add/remove: 1/3 grow/shrink: 2/1 up/down: 4777/-4956 (-179) function old new delta handle_errors - 3994 +3994 __verbs_timer 42 710 +668 ipath_do_ruc_send 2131 2246 +115 ipath_no_bufs_available 136 - -136 ipath_disarm_senderrbufs 639 - -639 ipath_ib_timer 658 - -658 ipath_intr 5878 2355 -3523 Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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- 10 7月, 2007 3 次提交
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由 John Gregor 提交于
Now that it's June, it's about time to update the copyright notices of files that have changed. Signed-off-by: NJohn Gregor <john.gregor@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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由 Michael Albaugh 提交于
We currently track various errors, now we enhance that capability by logging some of them to EEPROM. We also now log a cumulative "active" time defined by traffic though the InfiniPath HCA beyond the normal SM traffic. Signed-off-by: NMichael Albaugh <michael.albaugh@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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由 Michael Albaugh 提交于
The new LED blinking interface adds more contention for the unprotected GPIO pins that were already shared, though not commonly at the same time. We add locks to the accesses to these pins so that Read-Modify-Write is now safe. Some of these locks are added at interrupt context, so we shadow the registers which drive and inspect these pins to avoid the mmio read/writes. This mitigates the effects of the locks and hastens us through the interrupt. Add locking and always use shadows for registers controlling GPIO pins (ExtCtrl and GPIOout). The use of shadows implies doing less I/O, which can make I2C operation too fast on some platforms. An explicit udelay(1) in SCL manipulation fixes that. Signed-off-by: NMichael Albaugh <michael.albaugh@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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- 19 4月, 2007 1 次提交
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由 Bryan O'Sullivan 提交于
Mostly cleanup. Signed-off-by: NDave Olson <dave.olson@qlogic.com> Signed-off-by: NBryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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- 29 9月, 2006 2 次提交
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由 Bryan O'Sullivan 提交于
The EEPROM is read via programmable I/O pins. When the driver is compiled -Os, the CPU can speculatively read the I/O value before it is valid. This patch fixes the problem. Signed-off-by: NBryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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由 Bryan O'Sullivan 提交于
Prior to this change, the driver was not able to support a HT and PCIE card simultaneously present in the same machine. Signed-off-by: NBryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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- 02 7月, 2006 2 次提交
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由 Bryan O'Sullivan 提交于
We do a few more explicit checks for specific models, and now also support the old PathScale serial number style, or new QLogic style. This is backwards compatible with previous versions of software and hardware. That is, older software will see a plausible serial number and correct GUID when used with a new board, while newer software will correctly handle an older board. Signed-off-by: NMike Albaugh <mike.albaugh@qlogic.com> Signed-off-by: NDave Olson <dave.olson@qlogic.com> Signed-off-by: NBryan O'Sullivan <bryan.osullivan@qlogic.com> Cc: "Michael S. Tsirkin" <mst@mellanox.co.il> Cc: Roland Dreier <rolandd@cisco.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Bryan O'Sullivan 提交于
Signed-off-by: NBryan O'Sullivan <bryan.osullivan@qlogic.com> Cc: "Michael S. Tsirkin" <mst@mellanox.co.il> Cc: Roland Dreier <rolandd@cisco.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 24 5月, 2006 1 次提交
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由 Bryan O'Sullivan 提交于
This is required for even semi-decent performance on OpenIB. Signed-off-by: NBryan O'Sullivan <bos@pathscale.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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- 01 4月, 2006 1 次提交
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由 Bryan O'Sullivan 提交于
EEPROM support, interrupt handling, statistics gathering, and write combining management for x86_64. A note regarding i2c: The Atmel EEPROM hardware we use looks like an i2c device electrically, but is not i2c compliant at all from a functional perspective. We tried using the kernel's i2c support to talk to it, but failed. Normal i2c devices have a single 7-bit or 10-bit i2c address that they respond to. Valid 7-bit addresses range from 0x03 to 0x77. Addresses 0x00 to 0x02 and 0x78 to 0x7F are special reserved addresses (e.g. 0x00 is the "general call" address.) The Atmel device, on the other hand, responds to ALL addresses. It's designed to be the only device on a given i2c bus. A given i2c device address corresponds to the memory address within the i2c device itself. At least one reason why the linux core i2c stuff won't work for this is that it prohibits access to reserved addresses like 0x00, which are really valid addresses on the Atmel devices. Signed-off-by: NBryan O'Sullivan <bos@pathscale.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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