- 21 5月, 2010 40 次提交
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由 Jason Wessel 提交于
These are the minimum changes to the kgdb core in order to enable an API to connect a new front end (kdb) to the debug core. This patch introduces the dbg_kdb_mode variable controls where the user level I/O is routed. It will be routed to the gdbstub (kgdb) or to the kdb front end which is a simple shell available over the kgdboc connection. You can switch back and forth between kdb or the gdb stub mode of operation dynamically. From gdb stub mode you can blindly type "$3#33", or from the kdb mode you can enter "kgdb" to switch to the gdb stub. The logic in the debug core depends on kdb to look for the typical gdb connection sequences and return immediately with KGDB_PASS_EVENT if a gdb serial command sequence is detected. That should allow a reasonably seamless transition between kdb -> gdb without leaving the kernel exception state. The two gdb serial queries that kdb is responsible for detecting are the "?" and "qSupported" packets. CC: Ingo Molnar <mingo@elte.hu> Signed-off-by: NJason Wessel <jason.wessel@windriver.com> Acked-by: NMartin Hicks <mort@sgi.com>
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由 Jason Wessel 提交于
This patch contains the hooks and instrumentation into kernel which live outside the kernel/debug directory, which the kdb core will call to run commands like lsmod, dmesg, bt etc... CC: linux-arch@vger.kernel.org Signed-off-by: NJason Wessel <jason.wessel@windriver.com> Signed-off-by: NMartin Hicks <mort@sgi.com>
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由 Anand Gadiyar 提交于
Add platform init code for the OMAP3 OHCI driver. Also, configure padconf settings for OMAP3 depending on which port mode is used. Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Ajay Kumar Gupta 提交于
EXTVBUS programming is required by OMAP3EVM REV >=E to supply 500mA power so adding a flag which can be used by musb driver to program EXTVBUS. Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Tony Lindgren 提交于
Add support for i2c init for omap4. This patch is based on and earlier patch by Santosh Shilimkar <santosh.shilimkar@ti.com>. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Add separate omap_i2c_add_bus functions for mach-omap1 and mach-omap2. Make the mach-omap2 init set the interrupt dynamically to support. This is needed to add support for omap4 in a way that works with multi-omap builds. This will eventually get fixed in a generic way with the omap hwmods. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
The OMAP2 MPU virtual clock node code attempted to call clk_get_rate() while the clockfw_lock spinlock was held. Fix by reading the sys_ck rate directly. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Add some missing credits for people who have contributed significant features or fixes. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Thara Gopinath <thara@ti.com>
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由 Rajendra Nayak 提交于
Some powerdomains in OMAP4 support a direct transition from one sleep state to another deeper sleep state without having to wakeup the powerdomain. This patch adds an api in the powerdomain framework to set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Laine Walker-Avina 提交于
Add clock framework support for changing the rate of sys_clkout2. Signed-off-by: NLaine Walker-Avina <lwalkera@ieee.org> [paul@pwsan.com: added commit message, added .round_rate pointer] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
The pwrsts flag for ALWAYS ON domains like always_on_core_pwrdm and wkup_pwrdm is wrongly populated with the define for a powerdomain power state, instead of the allowable state bitfields. This causes a few api's to fail sensing invalid pwrst requested. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
The clock sources for timers on OMAP4 (system clock and 32k clock) have their names wronly populated. This patch fixes them so the omap_dm_timer_set_source does not fail anymore. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Remove the hack put in place while clock framework was still not in place for OMAP4. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
The cm44xx.h files only had absolute register address defines for all CM registers. This patch adds additional register offset defines for all the registers, so they can be used with apis like cm_read_mod_* Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
The prm44xx.h files only had absolute register address defines for all PRM registers. This patch adds additional register offset defines for all the registers, so they can be used with apis like prm_read_mod_* Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
CM1, CM2, PRM, SCRM and MPU_PRCM are already defined in omap44xx.h Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
The MPU subsystem was named based on internal code name (CHIRON). This patch will remove all the occurences of the chiron name are replace it with PRCM_MPU in order to differentiate the MPU local PRCM to the global one. Remove PDA_ from PRCM_MPU registers names to stick to the global PRM naming convention. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
The automatic HW restore from OFF mode is not functional at all in OMAP4430 ES1.0. Because of that, it will be extensively changed in the next Si revision, and the compatibilty will not be maintained with ES1.0. Remove the current XXX_RESTORE registers definition to avoid future conflicts with the next Si revision. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
Most of the clock nodes belong to a clock domain, but it is perfectly valid to have clock without clock domain. Root clocks for example does not belong to any clock domain. Keep the warning but reduce the verbosity. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
In the lastest OMAP4 hwmod data file, the _hwmod was removed in order to save some memory space and because it does not bring a lot. The same cleanup will be have to done for other hwmods in OMAP2 & 3 data files. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
During the _init_clocks phase, the iteration is stopped but the status is still change from _HWMOD_STATE_REGISTERED to _HWMOD_STATE_CLKS_INITED. Since the _setup phase will be done nevertheless, it might be better to keep initializing the others clocks nodes and just keep the warning. It is much easier to debug when a important number of clocks name are wrong during the early debug phase of a new platform. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The WARN is a little bit too verbose and is not providing usefull information in that case. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The previous clock API was returning a standard linux error code in case of failure. This is not the case anymore with the new omap_clk_get_by_name API. A NULL value means that the clock node does not exist. Replace all the IS_ERR check by a !clk check. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The iteration is currently done on the omap_hwmod_ocp_if pointer and not on the table pointer that reference them. It worked most of the time because the structure are contiguous in memory. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Some initiator modules in OMAP2 & 3 does not have IDLEST bit, in that case we cannot detect the module readiness by polling that bit and must exist the function immediately assuming that the module is ready. The previous flag was affected to the OCP interface. While it is technically true that the idlest is related to the L4 slave interface of the module, the PRCM status belong to the module. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The return of the omap4_cm_wait_module_ready function is checked in order to avoid accessing the sysconfig register if the module is not in the correct state. In that case the _setup will exit without trying to reset using sysconfig. For the moment a warning is printed. A proper management of fclk and module reset will have to be done in order to init correctly the problematic IPs listed below. <4>omap_hwmod: ivahd: cannot be enabled (3) <4>omap_hwmod: iss: cannot be enabled (3) <4>omap_hwmod: tesla: cannot be enabled (3) <4>omap_hwmod: sdma: cannot be enabled (3) <4>omap_hwmod: sl2: cannot be enabled (3) <4>omap_hwmod: sad2d: cannot be enabled (3) <4>omap_hwmod: ducati: cannot be enabled (3) Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The maximum timeout to wait for the PRCM to request that a module exit idle or reach functionnal state is common to OMAP2/3/4 SoCs, so, move it to the chip family-common cm.h include file. Reduce the timeout from 20 ms to 2 ms. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Accessing the clkctrl register using offset of module & device is hard to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located in the address space. There is no common base address anymore for all the CM registers. The easiest way to handle that on OMAP4 is to provide the absolute address of the XXX_CLKCTRL register per hwmod. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Paul Walmsley 提交于
Clean up comment style, remove unnecessary includes, and resolve some checkpatch warnings in plat-omap/clock.c. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Commit 678bc9a2 split dpll4_m2_ck, creating a 34xx and a 36xx variant, to handle the additional 16 divider steps provided on the 36xx. This in turn required dynamic rewriting of the clock tree during initialization, which is undesirable. All this seems to be unnecessary, though, since the additional 16 divider steps can simply be marked with RATE_IN_36XX. This patch does so and re-merges the affected structures. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
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由 Paul Walmsley 提交于
Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect that these rates are valid on all OMAP3 platforms, not just 343X. Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all OMAP3 platforms after 3430ES2. This patch should not result in any functional changes. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
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由 Paul Walmsley 提交于
This patch cleans up arch/arm/mach-omap2/clkt_clksel.c. It: - makes several functions static that are not called outside the file; - adds documentation; - makes some code paths easier to read (hopefully), by breaking up compound statements and removing redundant checks; - converts some pr_err()s that indicate clock tree data problems into WARN()s, so they are more likely to be noticed; - and moves omap2_clk_round_rate() back into mach-omap2/clock.c, its proper home, since it is not clksel-specific. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set on some of the lowest divisors, which, when switching to a much higher-rate parent, could have potentially resulted in rates that exceeded the hardware specifications for downstream clocks in the window between the clk_set_parent(), and a subsequent clk_set_rate(). It seems much safer to just remove the flag and always use the highest available divisor (resulting in the lowest possible rate) after the switch, and this patch does so. Ideally, it would be best to first attempt to switch to a divisor that matches the clock's rate with the previous parent, if at all possible. But that is a project for some other day or some other person. The parent changing code is rarely used. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros, to match the TRM and guard against inadvertent error. This patch should not cause any functional change. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
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由 Paul Walmsley 提交于
Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Felipe Balbi 提交于
remove the section annotation from omap1_clk_disable_unused() to kill the section mismatch warning. Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tony Lindgren 提交于
Add stalker board to omap3_defconfig Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Anand Gadiyar 提交于
- Update the omap3_defconfig to sync up with the generated .config - Increase CONFIG_LOG_BUF_SHIFT to 16 to allow the entire boot log to be captured (useful when using boot time tracer, for example) Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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