1. 16 12月, 2011 1 次提交
  2. 08 12月, 2011 1 次提交
  3. 29 11月, 2011 1 次提交
  4. 09 11月, 2011 1 次提交
  5. 12 10月, 2011 5 次提交
  6. 01 10月, 2011 2 次提交
  7. 20 9月, 2011 3 次提交
  8. 17 9月, 2011 7 次提交
  9. 15 9月, 2011 2 次提交
  10. 14 9月, 2011 1 次提交
  11. 31 8月, 2011 4 次提交
  12. 30 8月, 2011 1 次提交
  13. 26 8月, 2011 1 次提交
  14. 25 8月, 2011 2 次提交
  15. 13 8月, 2011 1 次提交
  16. 10 8月, 2011 1 次提交
  17. 19 7月, 2011 1 次提交
    • R
      ath9k: Fix sparse warnings · 5479de6e
      Rajkumar Manoharan 提交于
      drivers/net/wireless/ath/ath9k/init.c:199:21: warning: context imbalance
      in 'ath9k_reg_rmw' - different lock contexts for basic block
      drivers/net/wireless/ath/ath9k/xmit.c:1175:31: warning: context
      imbalance in 'ath_drain_txq_list' - unexpected unlock
      drivers/net/wireless/ath/ath9k/xmit.c:2047:23: warning: context
      imbalance in 'ath_tx_process_buffer' - unexpected unlock
      drivers/net/wireless/ath/ath9k/ar9003_eeprom.c:3041:24: warning: cast to
      restricted __le32
      Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      5479de6e
  18. 06 7月, 2011 1 次提交
  19. 28 6月, 2011 1 次提交
    • R
      ath9k: Fix locking issue during tx completion · f6b4e4d4
      Rajkumar Manoharan 提交于
      The received tx status of aggregated frame without BlockAck may
      cause deaf state in AR5416 cards. So the driver does a reset to
      recover. When this happens, we release the pcu_lock before doing
      a reset as ath_rest acquires pcu_lock. This is ugly and also not
      atomic. Fixing this addresses the TX DMA failure also.
      
      ath_tx_complete_aggr can be called from different paths which
      takes different variants of spin_lock. This patch also addresses
      the following warning.
      
      WARNING: at kernel/timer.c:1011 del_timer_sync+0x4e/0x50()
      Call Trace:
       <IRQ>  [<ffffffff8104be3a>] warn_slowpath_common+0x7a/0xb0
       [<ffffffff8104be85>] warn_slowpath_null+0x15/0x20
       [<ffffffff8105915e>] del_timer_sync+0x4e/0x50
       [<ffffffffa03726be>] ath_reset+0x3e/0x210 [ath9k]
       [<ffffffff8135cdaf>] ? _raw_spin_unlock_bh+0x1f/0x30
       [<ffffffffa037760a>] ath_tx_complete_aggr.isra.26+0x54a/0xa40 [ath9k]
      Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      f6b4e4d4
  20. 22 6月, 2011 1 次提交
    • A
      net: remove mm.h inclusion from netdevice.h · b7f080cf
      Alexey Dobriyan 提交于
      Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
      
      To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
      definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
      via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
      Removal of mm.h from scatterlist.h was tried and was found not feasible
      on most archs, so the link was cutoff earlier.
      
      Hope people are OK with tiny include file.
      
      Note, that mm_types.h is still dragged in, but it is a separate story.
      Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b7f080cf
  21. 02 6月, 2011 1 次提交
    • F
      ath9k: unify edma and non-edma tx code, improve tx fifo handling · fce041be
      Felix Fietkau 提交于
      EDMA based chips (AR9380+) have 8 Tx FIFO slots, which are used to fix the
      tx queue start/stop race conditions which have to be worked around for
      earlier chips by keeping the last descriptor in the queue. The current code
      stores all frames that do not fit onto the 8 FIFO slots in a separate
      list. Whenever a FIFO slot is freed up, the next frame (or A-MPDU) from the
      pending queue gets moved to that slot.
      
      This process is not only inefficient, but also unnecessary. The code can
      be improved visibly by keeping the pending queue fully linked, and moving
      the contents of the entire queue to a FIFO slot as it becomes available.
      
      This patch makes the necessary changes for that and also merges some code
      that was duplicated for EDMA vs non-EDMA. It changes txq->axq_link to point
      to the last descriptor instead of the link pointer, so that
      ath9k_hw_set_desc_link can be used, which works on all chips.
      
      With this patch, a small performance increase for non-aggregated traffic
      was observed on AR9380 based embedded hardware.
      Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      fce041be
  22. 20 5月, 2011 1 次提交